The design and analysis of VLSI circuits
The design and analysis of VLSI circuits
Design of the IBM RISC System/6000 floating-point execution unit
IBM Journal of Research and Development
Computation of elementary functions on the IBM RISC System/6000 processor
IBM Journal of Research and Development
Introduction to Arithmetic for Digital Systems Designers
Introduction to Arithmetic for Digital Systems Designers
Sub-nanosecond arithmetic
IEEE Transactions on Parallel and Distributed Systems
Area and performance tradeoffs in floating-point divide and square-root implementations
ACM Computing Surveys (CSUR)
Design Issues in Division and Other Floating-Point Operations
IEEE Transactions on Computers
Division Algorithms and Implementations
IEEE Transactions on Computers
IMEM: an intelligent memory for bump- and reflection-mapping
HWWS '98 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
A Mechanically Checked Proof of the AMD5K86TM Floating-Point Division Program
IEEE Transactions on Computers
Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit
IEEE Transactions on Computers
SPAF: sub-texel precision anisotropic filtering
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
Very-High Radix Division with Prescaling and Selection by Rounding
IEEE Transactions on Computers
Fast Evaluation of the Elementary Functions in Single Precision
IEEE Transactions on Computers
Division Using a Logarithmic-Exponential Transform to Form a Short Reciprocal
IEEE Transactions on Computers
A New Divide and Conquer Method for Achieving High Speed Division in Hardware
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
A Cost-Effective Pipelined Divider with a Small Lookup Table
IEEE Transactions on Computers
Design and Implementation of a Fast Digital Fuzzy Logic Controller Using FPGA Technology
Journal of Intelligent and Robotic Systems
A pipelined divider with a small lookup table
IMCAS'07 Proceedings of the 6th WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems
A 33MHz 16-bit gradient calculator for real-time volume imaging
EGGH'94 Proceedings of the Ninth Eurographics conference on Graphics Hardware
Hardware supported bump mapping: a step towards higher quality real-time rendering
EGGH'95 Proceedings of the Tenth Eurographics conference on Graphics Hardware
The setup for triangle rasterization
EGGH'96 Proceedings of the Eleventh Eurographics conference on Graphics Hardware
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A class of iterative integer division algorithms is presented based on look-up table and Taylor-series approximations to the reciprocal. The algorithm iterates by using the reciprocal to find an approximate quotient and then subtracting the quotient multiplied by the divisor from the dividend to find a remaining dividend. Fast implementations can produce an average of either 14 or 27 b per iteration, depending on whether the basic or advanced version of this method is implemented. Detailed analyses are presented to support the claimed accuracy per iteration. Speed estimates using state-of-the-art ECL components show that this method is faster than the Newton-Raphson technique and can produce 53-b quotients of 53-b numbers in about 25 ns using the basic method and 21 ns using the advanced method. In addition, these methods naturally produce an exact remainder, which is very useful for implementing precise rounding specifications.