Digital systems and hardware/firmware algorithms
Digital systems and hardware/firmware algorithms
Computer arithmetic algorithms
Computer arithmetic algorithms
Fast Division Using Accurate Quotient Approximations to Reduce the Number of Iterations
IEEE Transactions on Computers - Special issue on computer arithmetic
Design Issues in Division and Other Floating-Point Operations
IEEE Transactions on Computers
Division Algorithms and Implementations
IEEE Transactions on Computers
High-Speed Double-Precision Computation of Reciprocal, Division, Square Root and Inverse Square Root
IEEE Transactions on Computers
Redundant Binary Booth Recoding
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
The setup for triangle rasterization
EGGH'96 Proceedings of the Eleventh Eurographics conference on Graphics Hardware
A pipelined divider with a small lookup table
IMCAS'07 Proceedings of the 6th WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems
Technical Section: Area-efficient pixel rasterization and texture coordinate interpolation
Computers and Graphics
A flexible layered architecture for accurate digital baseband algorithm development and verification
Proceedings of the Conference on Design, Automation and Test in Europe
| Hi-index | 14.98 |
Current pipelinable dividers require very large lookup tables. We propose a cost-effective pipelinable divider that uses a modified Taylor-series expansion and has a smaller lookup table than other pipelinable dividers. The proposed divider requires about 27 percent less area than the pipelinable divider based on normal Taylor-series expansion in single precision.