Maximally equidistributed combined Tausworthe generators
Mathematics of Computation
Tables of maximally equidistributed combined LFSR generators
Mathematics of Computation
Accelerating Bit Error Rate Testing Using a System Level Design Tool
FCCM '03 Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
A Cost-Effective Pipelined Divider with a Small Lookup Table
IEEE Transactions on Computers
On the complexity of curve fitting algorithms
Journal of Complexity
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Many emerging communication technologies significantly increase the complexity of the physical layer and have dramatically increased the number of operating configurations. To ensure maximum performance, designers have to optimize their algorithm implementations, which requires for comprehensive performance testing in all possible operating modes various channel conditions. This paper presents a flexible and affordable framework for baseband algorithm development and performance verification for digital communication systems with an arbitrary number of modules, each operating at a possibly different sampling rate with various latencies. The proposed architecture is scalable to support complex scenarios, such as multiple antenna systems, and is compact enough to be implemented within a single field-programmable gate array.