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IBM Journal of Research and Development
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IBM Journal of Research and Development
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IBM Journal of Research and Development
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Introduction to VLSI Systems
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IBM Journal of Research and Development
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IBM Journal of Research and Development
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IBM Journal of Research and Development
Instruction scheduling for the IBM RISC System/6000 processor
IBM Journal of Research and Development
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IBM Journal of Research and Development
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IEEE Transactions on Computers - Special issue on computer arithmetic
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IEEE Transactions on Computers - Special issue on computer arithmetic
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IEEE Micro
Area and performance tradeoffs in floating-point divide and square-root implementations
ACM Computing Surveys (CSUR)
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IBM Journal of Research and Development
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IEEE Transactions on Computers
Highly accurate data value prediction using hybrid predictors
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Comparison of Single- and Dual-Pass Multiply-Add Fused Floating-Point Units
IEEE Transactions on Computers
Leading-One Prediction with Concurrent Position Correction
IEEE Transactions on Computers
Multimedia Execution Hardware Accelerator
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Proceedings of the 2001 ACM/IEEE conference on Supercomputing
A Processor Architecture for 3D Graphics
IEEE Computer Graphics and Applications
IEEE Transactions on Computers
IEEE Transactions on Computers
High-Performance 3-1 Interlock Collapsing ALU's
IEEE Transactions on Computers
Over-Redundant Digit Sets and the Design of Digit-By-Digit Division Units
IEEE Transactions on Computers
On Hardware for Computing Exponential and Trigonometric Functions
IEEE Transactions on Computers
ACM Transactions on Mathematical Software (TOMS)
High-performance linear algebra algorithms using new generalized data structures for matrices
IBM Journal of Research and Development
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques
Automatic Formal Verification of Fused-Multiply-Add FPUs
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FPU Implementations with Denormalized Numbers
IEEE Transactions on Computers
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Lightweight floating-point arithmetic: case study of inverse discrete cosine transform
EURASIP Journal on Applied Signal Processing
Parallel error detection for leading zero anticipation
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IBM Journal of Research and Development
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IBM Journal of Research and Development
A 270ps 20mW 108-bit End-around Carry Adder for Multiply-Add Fused Floating Point Unit
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Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers
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Bridge floating-point fused multiply-add design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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ACM Transactions on Architecture and Code Optimization (TACO)
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Speculative hardware/software co-designed floating-point multiply-add fusion
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