Mathematica: a system for doing mathematics by computer
Mathematica: a system for doing mathematics by computer
Minimum relative error approximations for 1/t
Numerische Mathematik
Boolean functions with engineering applications and computer programs
Boolean functions with engineering applications and computer programs
A Systematic Method for Division with High Average Bit Skipping
IEEE Transactions on Computers
Design of the IBM RISC System/6000 floating-point execution unit
IBM Journal of Research and Development
An accurate elementary mathematical library for the IEEE floating point standard
ACM Transactions on Mathematical Software (TOMS)
Hard-Wired Multipliers with Encoded Partial Products
IEEE Transactions on Computers
Cost-efficient high-radix division
Journal of VLSI Signal Processing Systems - Special issue: computer arithmetic
High-radix algorithms for high-order arithmetic operations
High-radix algorithms for high-order arithmetic operations
A method for calculation of the square root using combinatorial logic
Journal of VLSI Signal Processing Systems
IEEE Transactions on Parallel and Distributed Systems
Starting approximations for square root calculation on IBM system /360
Communications of the ACM
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Computer Approximations
Introduction to Arithmetic for Digital Systems Designers
Introduction to Arithmetic for Digital Systems Designers
Some Results on a SRT Type Division Scheme
IEEE Transactions on Computers
Parallel High-Radix Nonrestoring Division
IEEE Transactions on Computers
Fast Evaluation of the Elementary Functions in Single Precision
IEEE Transactions on Computers
Efficient Initial Approximation and Fast Converging Methods for Division and Square Root
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
Function Evaluation by Table Look-up and Addition
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
Hardwired elementary function generators for neural network emulators
Hardwired elementary function generators for neural network emulators
Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit
IEEE Transactions on Computers
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Quadratically converging algorithms for high-order arithmetic operations typically are accelerated by a starting approximation. The higher the precision of the starting approximation, the less number of iterations required for convergence. Traditional methods have used look-up tables or polynomial approximations, or a combination of the two called piecewise linear approximations. This paper provides a revision and major extension to our study [1] proposing a nontraditional method for reusing the hardware of a multiplier. An approximation is described in the form of partial product array (PPA) composed of Boolean elements. The Boolean elements are chosen such that their sum is a high-precision approximation to a high-order arithmetic operation such as square root, reciprocal, division, logarithm, exponential, and trigonometric functions. This paper derives a PPA that produces in the worst case a 16-bit approximation to the square root operation. The implementation of the PPA utilizes an existing 53 bit multiplier design requiring approximately 1,000 dedicated logic gates of function, additional repowering circuits, and has a latency of one multiplication.