Boolean functions with engineering applications and computer programs
Boolean functions with engineering applications and computer programs
A Systematic Method for Division with High Average Bit Skipping
IEEE Transactions on Computers
Radix-16 Signed-Digit Division
IEEE Transactions on Computers
Hard-Wired Multipliers with Encoded Partial Products
IEEE Transactions on Computers
Cost-efficient high-radix division
Journal of VLSI Signal Processing Systems - Special issue: computer arithmetic
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Introduction to Arithmetic for Digital Systems Designers
Introduction to Arithmetic for Digital Systems Designers
Simple Radix-4 Division with Operands Scaling
IEEE Transactions on Computers
Some Results on a SRT Type Division Scheme
IEEE Transactions on Computers
A study of methods for selection of quotient digits during digital division
A study of methods for selection of quotient digits during digital division
Hardware Starting Approximation Method and Its Application to the Square Root Operation
IEEE Transactions on Computers
Division Using a Logarithmic-Exponential Transform to Form a Short Reciprocal
IEEE Transactions on Computers
A New Divide and Conquer Method for Achieving High Speed Division in Hardware
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
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An algorithm for high-radix nonrestoring division is proposed which combines a cost-efficient quotient estimation technique with collapsing of the division into one operation each iteration. The quotient estimation technique is a direct combinatorial algorithm which allows a more generalized partial remainder than similar studies. In addition, the successor partial remainder is calculated directly from the previous partial remainder. The intermediate steps of calculating the next quotient estimate, multiplying it by the divisor, and then subtracting the result from the previous remainder are telescoped into one step. This is possible due to the use of simple direct combinatorial equations for the quotient estimate. Thus, one operation is used to generate the next remainder from the previous remainder. This operation is similar to a multiplication with a reduced carry propagate adder. This algorithm reduces the latency of each iteration to less than the delay of one multiplication. Thus, high-radix nonrestoring division is possible with a low latency and no need for an off-chip ROM to hold a quotient estimate.