On-the-fly conversion of redundant into conventional representations
IEEE Transactions on Computers
Higher Radix Square Root with Prescaling
IEEE Transactions on Computers - Special issue on computer arithmetic
Unified Mixed Radix 2-4 Redundant CORDIC Processor
IEEE Transactions on Computers
Radix 2 Division with Over-Redundant Quotient Selection
IEEE Transactions on Computers
Division Algorithms and Implementations
IEEE Transactions on Computers
IEEE Transactions on Computers
Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit
IEEE Transactions on Computers
Signed Digit Addition and Related Operations with Threshold Logic
IEEE Transactions on Computers
A Radix-4 New Svobota-Tung Divider with Constant Timing Complexity for Prescaling
Journal of VLSI Signal Processing Systems
Design of a Radix 4 Division Unit with Simple Selection Table
IEEE Transactions on Computers
IEEE Transactions on Computers
Parallel High-Radix Nonrestoring Division
IEEE Transactions on Computers
Over-Redundant Digit Sets and the Design of Digit-By-Digit Division Units
IEEE Transactions on Computers
Very-High Radix Division with Prescaling and Selection by Rounding
IEEE Transactions on Computers
A Fast Radix-4 Division Algorithm and its Architecture
IEEE Transactions on Computers
Choices of Operand Truncation in the SRT Division Algorithm
IEEE Transactions on Computers
Division Using a Logarithmic-Exponential Transform to Form a Short Reciprocal
IEEE Transactions on Computers
Faster Modular Multiplication by Operand Scaling
CRYPTO '91 Proceedings of the 11th Annual International Cryptology Conference on Advances in Cryptology
Interactive presentation: Radix 4 SRT division with quotient prediction and operand scaling
Proceedings of the conference on Design, automation and test in Europe
Minimizing the complexity of SRT tables
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 15.02 |
A radix-4 division algorithm with operands scaling is proposed. The algorithm uses a recurrence with redundant addition (carry-save or signed-digit) and combines simple scaling with a quotient-selection function that depends only on the estimate of the partial remainder and is independent of the divisor. The scheme results in a significant speedup with respect to both the radix-2 and radix-4 without scaling.