Design of a high-speed square root multiply and divide unit
IEEE Transactions on Computers
On-the-fly conversion of redundant into conventional representations
IEEE Transactions on Computers
On-line scheme for computing rotation factors
Journal of Parallel and Distributed Computing - Parallelism in Computer Arithmetic
Design of the IBM RISC System/6000 floating-point execution unit
IBM Journal of Research and Development
Fast Multiplication Without Carry-Propagate Addition
IEEE Transactions on Computers
IEEE Transactions on Computers
On the Time Required to Perform Addition
Journal of the ACM (JACM)
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Introduction to Arithmetic for Digital Systems Designers
Introduction to Arithmetic for Digital Systems Designers
Simple Radix-4 Division with Operands Scaling
IEEE Transactions on Computers
IEEE Transactions on Computers
SRT division diagrams and their usage in designing intergrated circuits for division
SRT division diagrams and their usage in designing intergrated circuits for division
Online arithmetic algorithms for efficient implementation
Online arithmetic algorithms for efficient implementation
Radix 2 Division with Over-Redundant Quotient Selection
IEEE Transactions on Computers
Division Algorithms and Implementations
IEEE Transactions on Computers
IEEE Transactions on Computers
A Radix 2 Shared Division/Square Root Algorithm and its VLSI Architecture
Journal of VLSI Signal Processing Systems
A Radix-4 New Svobota-Tung Divider with Constant Timing Complexity for Prescaling
Journal of VLSI Signal Processing Systems
A Fast Radix-4 Division Algorithm and its Architecture
IEEE Transactions on Computers
Svoboda-Tung division with no compensation
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Minimizing the complexity of SRT tables
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Decimal Division Algorithms: The Issue of Partial Remainders
Journal of Signal Processing Systems
| Hi-index | 14.99 |
Over-redundant digit sets are defined as those ranging from /spl minus/s to +s, with s/spl ges/B, B being the radix. This paper presents new techniques for the direct computation of division, that use an over-redundant digit set for representing the quotient, instead of simply redundant ones used previously. In particular, general criteria for synthesizing the digit selection rules and remainder updating are given for any radix and index of redundancy. A methodology combining the use of over-redundant digit sets with the prescaling of the divisor is also studied in order to achieve radix-B division units with trivial digit selection functions. It is also shown, for the specific case of radix-4 that using a prescaling slightly wider than in a radix-4 unit by M.D. Ercegovac and T. Lang (1990) possible to avoid the digit selection table. The paper also presents a modified algorithm for on-the-fly conversion of the result into the irredundant form. The proposed methodology can be considered as an alternative to existing division techniques.