Decimal Division Algorithms: The Issue of Partial Remainders

  • Authors:
  • Amir Kaivani;Seok-Bum Ko

  • Affiliations:
  • Department of Electrical and Computer Engineering, University of Saskatchewan, Saskatoon, Canada;Department of Electrical and Computer Engineering, University of Saskatchewan, Saskatoon, Canada

  • Venue:
  • Journal of Signal Processing Systems
  • Year:
  • 2013

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Abstract

The efficiency of decimal digit-recurrence division algorithms is totally affected by the number representations of the quotient, the divisor and partial remainders participated in quotient digit selection (QDS). This paper establishes general rules and conditions for QDS with operands represented in the generalized signed-digit format. As a result of this generalization, a universal convergence condition is introduced which obviates the unnecessary conservatism of previous algorithms and hence paves the way for more correct and efficient decimal division hardware designs. It is also concluded that keeping the partial remainders in minimally redundant symmetric signed-digit representation (with digit-set [驴5,6])and applying into QDS the divisor represented in minimally asymmetric non-redundant signed-digit format (with digit-set [驴4,5]) lead to the smallest minimum precision required, of the divisor and the partial remainder, for QDS and thus faster and simpler division algorithm. Moreover, it is shown that even in case of using non-redundant partial remainders (for the sake of lower area cost); minimally asymmetric signed-digit representation brings about more efficiency. The suggested representations are applied to the fastest previous decimal digit-recurrence divider and 10 % speed-up is achieved while keeping the area cost approximately unaltered.