High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree
IEEE Transactions on Computers
IEEE Transactions on Computers
A logical calculus of the ideas immanent in nervous activity
Neurocomputing: foundations of research
How we know universals: the perception of auditory and visual forms
Neurocomputing: foundations of research
Some notes on threshold circuits, and multiplication in depth 4
Information Processing Letters
Depth-Size Tradeoffs for Neural Computation
IEEE Transactions on Computers - Special issue on artificial neural networks
On Optimal Depth Threshold Circuits for Multiplication andRelated Problems
SIAM Journal on Discrete Mathematics
2-1 Addition and Related Arithmetic Operations with Threshold Logic
IEEE Transactions on Computers
&dgr;-bit serial binary addition with linear threshold network
Journal of VLSI Signal Processing Systems - Special issue on VLSI arithmetic and implementations
Simulating Threshold Circuits by Majority Circuits
SIAM Journal on Computing
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Simple Radix-4 Division with Operands Scaling
IEEE Transactions on Computers
A Note on the Simulation of Exponential Threshold Weights
COCOON '96 Proceedings of the Second Annual International Conference on Computing and Combinatorics
Block Save Addition with Threshold Logic
ASILOMAR '95 Proceedings of the 29th Asilomar Conference on Signals, Systems and Computers (2-Volume Set)
A new symbolic substitution based addition algorithm
Computers & Mathematics with Applications
Decomposition of threshold functions into bounded fan-in threshold functions
Information and Computation
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Assuming signed digit number representations, we investigate the implementation of some addition related operations assuming linear threshold networks. We measure the depth and size of the networks in terms of linear threshold gates. We show first that a depth-$2$ network with $O(n)$ size, weight, and fan-in complexities can perform signed digit symmetric functions. Consequently, assuming radix-$2$ signed digit representation, we show that the two operand addition can be performed by a threshold network of depth-$2$ having $O(n)$ size complexity and $O(1)$ weight and fan-in complexities. Furthermore, we show that, assuming radix-$(2n-1)$ signed digit representations, the multioperand addition can be computed by a depth-$2$ network with $O(n^3)$ size with the weight and fan-in complexities being polynomially bounded. Finally, we show that multiplication can be performed by a linear threshold network of depth-$3$ with the size of $O(n^3)$ requiring $O(n^3)$ weights and $O(n^2 \log n)$ fan-in.