Introduction to VLSI Systems
The genealogical approach to the layout problem
DAC '80 Proceedings of the 17th Design Automation Conference
A proper model for the partitioning of electrical circuits
DAC '72 Proceedings of the 9th Design Automation Workshop
On finding most optimal rectangular package plans
DAC '82 Proceedings of the 19th Design Automation Conference
Performance optimized floor planning by graph planarization
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A neural network design for circuit partitioning
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
PIAF: a knowledge-based/algorithm top-down floorplanning system
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Canonical embedding of rectangular duals with applications to VLSI floorplanning
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
An analytical approach to floorplan design and optimization
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
On floorplans of planar graphs
STOC '97 Proceedings of the twenty-ninth annual ACM symposium on Theory of computing
Automatic building of graphs for rectangular dualisation
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
MCNC's vertically integrated symbolic design system
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A linear algorithm to find a rectangular dual of a planar triangulated graph
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Flute—a floorplanning agent for full custom VLSI design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Automatic placement a review of current techniques (tutorial session)
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
HAPPI: a chip compiler based on double-level-metal technology
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Infuse: a tool for automatically managing and coordinating source changes in large systems
CSC '87 Proceedings of the 15th annual conference on Computer Science
ISPD '00 Proceedings of the 2000 international symposium on Physical design
PIAF: Efficient IC Floor Planning
IEEE Expert: Intelligent Systems and Their Applications
DAC '84 Proceedings of the 21st Design Automation Conference
On finding most optimal rectangular package plans
DAC '82 Proceedings of the 19th Design Automation Conference
A VLSI floorplanner based on "balloon" expansion
EURO-DAC '90 Proceedings of the conference on European design automation
Glue-logic partitioning for floorplans with a rectilinear datapath
EURO-DAC '91 Proceedings of the conference on European design automation
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The Planar Package Planner is a design aid aimed at helping to form a package layout plan, given only the information available during project initiation to digital system logic and package designers. A hierarchical approach is adopted, and a clustering program makes possible use of the layout scheme for bottom-up as well as top-down design. The layout plan for an experimental microprocessor is worked out as an example of the method.