Automatic building of graphs for rectangular dualisation

  • Authors:
  • Marwan A. Jabri

  • Affiliations:
  • Laboratory for Imaging Science and Engineering, School of Electrical Engineering, University of Sydney, New South Wales 2006, Australia

  • Venue:
  • DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
  • Year:
  • 1988

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Abstract

Rectangular dualisation is a technique used to generate rectangular topologies for use in top-down floorplanning of integrated circuits. This paper presents an efficient algorithm that transforms an arbitrary graph, representing a custom integrated circuit, into one suitable for rectangular dualisation. The algorithm makes use of efficient techniques in graph processing such as planar embedding and introduces a novel procedure to transform a tree of biconnected sub-graphs into a block neighbourhood graph that is a path.