Introduction to VLSI Systems
Design rule checking and analysis of IC mask designs
DAC '76 Proceedings of the 13th Design Automation Conference
SLIC - Symbolic Layout of Integrated Circuits
DAC '76 Proceedings of the 13th Design Automation Conference
Fast algorithms for LSI artwork analysis
DAC '77 Proceedings of the 14th Design Automation Conference
Unified Shapes Checker - a checking tool for LSI
DAC '79 Proceedings of the 16th Design Automation Conference
Topological analysis for VLSI circuits
DAC '79 Proceedings of the 16th Design Automation Conference
Efficient Boolean operations on IC masks
DAC '81 Proceedings of the 18th Design Automation Conference
PANAMAP-B: A mask verification system for bipolar IC
DAC '81 Proceedings of the 18th Design Automation Conference
Custom VLSI electrical rule checking in an intelligent terminal
DAC '81 Proceedings of the 18th Design Automation Conference
Automatic VLSI layout verification
DAC '81 Proceedings of the 18th Design Automation Conference
A “non-restrictive” artwork verification program for printed circuit boards
DAC '82 Proceedings of the 19th Design Automation Conference
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A program implementing a novel approach to layout verification is presented. The approach uses topological and device information to eliminate most false and unchecked errors. This technique, coupled with a hierarchical front end to eliminated redundant checks, is appropriate for layout verification of VLSI designs. Design rules appropriate for this technique, some usage rules in the context of structured design, and a discussion of the future of design rule checking are also presented.