ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A low cost hierarchical system for VLSI layout and verification
DAC '81 Proceedings of the 18th Design Automation Conference
Design integrity and immunity checking: A new look at layout verification and design rule checking
DAC '80 Proceedings of the 17th Design Automation Conference
SIDS (A Symbolic Interactive Design System)
DAC '80 Proceedings of the 17th Design Automation Conference
A symbolic design system for integrated circuits
DAC '82 Proceedings of the 19th Design Automation Conference
Optimal Layout of CMOS Functional Arrays
IEEE Transactions on Computers
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The purpose of this paper is to introduce a symbolic layout technique for MOS integrated circuits. We will give a description of symbolic layout, talk about its potential and briefly describe the symbolic layout system we have developed at AMI.