High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
MSTC: a method for identifying overconstraints during hierarchical compaction
DAC '93 Proceedings of the 30th international Design Automation Conference
Introduction to VLSI Systems
GENVIEW: a portable source-level debugger for macrocell generators
EURO-DAC '91 Proceedings of the conference on European design automation
A Novel Analog Module Generator Environment
EDTC '96 Proceedings of the 1996 European conference on Design and Test
An automated design tool for analog layouts
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring redundant arithmetics in computer-aided design of arithmetic datapaths
Integration, the VLSI Journal
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