VLSI architectures for high speed recognition of context-free languages and finite-state languages

  • Authors:
  • King-Hang Chu;King-Sun Fu

  • Affiliations:
  • School of Electrical Engineering, Purdue University, W. Lafayette, Indiana;School of Electrical Engineering, Purdue University, W. Lafayette, Indiana

  • Venue:
  • ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
  • Year:
  • 1982

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Abstract

This paper presents two VLSI architectures for the recognition of context-free languages and finite-state languages. The architecture for context-free languages consists of n(n+1)/2 identical cells and it is capable of recognizing an input string of length n in 2n time units. The architecture for finite-state languages consists of n cells and it can recognize a string of length n in constant time. Since both architectures have characteristics such as modular layout, simple constrol and dataflow pattern, high degree of multiprocessing and/or pipelining, etc., they are very suitable for VLSI implementation.