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The typical node of a message-based multicomputer consists of a microprocessor, router and memory. At the California Institute of Technology, the Mosaic project has integrated such a node onto a single chip. That reduction in scale fundamentally changes the scope of node application, since nodes become both very small, and inexpensive.Mosaic nodes may be employed to process, to generate, or to receive data. Since the router in a Mosaic node is independent of the microprocessor, computation and routing take place simultaneously. These nodes may be used to create general purpose gigabit LANs. They may also be used to create special purpose gigabit networks to interconnect instrumentation within spacecraft or aircraft.The ATOMIC project at USC/ISI is using Mosaic nodes to prototype a gigabit LAN testbed. This testbed is operational. Networking and administration software provides full TCP/IP compatibility. Packets have been exchanged between two interfaces at a rate above one gigabit per second (Gb/s).An individual ATOMIC interface is both inexpensive and small, consisting of one Mosaic chip, four SRAM chips and clock logic. Two interfaces easily fit onto a postcard-sized circuit board. Their low cost makes it practical to include several interfaces within a host, providing an interior Gb/s distribution network, multiple access points to the LAN for greater performance or redundancy, and other capabilities that are not yet fully explored. The results reported in this paper represent actual data obtained from the prototype.