Experiments with the SLIM Circuit Compactor

Authors:
Ralph C. McGarity;Daniel P. Siewiorek
Affiliations:
Motorola, Inc., MOS Integrated Circuit group, Microcomponent Division, Austin, Texas;Departments of Electrical Engineering and Computer Sciance, Carnegie-Mellon Universitg, Pittsburgh, Pennsylvania
Venue:
DAC '83 Proceedings of the 20th Design Automation Conference
Year:
1983

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Abstract

Experiments performed with the SLIM symbolic circuit compactor are described. The experiments were designed to compare SLIM created modules to manually created modules, to attempt to find performance predictors for SLIM, and to determine how well SLIM would compact modules created by a “synthesis-by-refinement” program. The results indicate that SLIM compacts modules which will be created by this program as area efficiently as it compacts modules created by other methods. Also, a performance predictor which estimates the area required by SLIM generated modules was developed. Finally, it was found that SLIM's designs are larger than manual designs by 60% to 90%.