Parallel 2-D Convolution on a Mesh Connected Array Processor
IEEE Transactions on Pattern Analysis and Machine Intelligence
Parallel image normalization on a mesh connected array processor
Pattern Recognition
A Queueing Model with Finite Waiting Room and Blocking
Journal of the ACM (JACM)
Local Networks
Digital Image Processing
Introduction to VLSI Systems
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
Performance Metrics for Embedded Parallel Pipelines
IEEE Transactions on Parallel and Distributed Systems
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A system design/scheduling strategy is described for a real-time parallel image processing system. A parallel image processing model based on the spatial and temporal parallelisms extractable in image processing tasks is formulated. This model consists of linear pipeline stages, each of which is a multiprocessing module. The strategy is discussed for two cases: static and dynamic. The description of the detailed hardware structure of each module is not attempted because of its dependency on a specific task. In the static case, where the processing time is constant, the processing times of all the stages are adjusted to be identical. In the dynamic case, where the processing time varies with each image, the strategy needs to be modified to achieve the maximum possible processing speed. The strategy is demonstrated for the static case by implementing image processing tasks on two different multiprocessor systems.