Introduction to VLSI Systems
SHARPS: A hierarchical layout system for VLSI
DAC '81 Proceedings of the 18th Design Automation Conference
The genealogical approach to the layout problem
DAC '80 Proceedings of the 17th Design Automation Conference
DAC '76 Proceedings of the 13th Design Automation Conference
A class of min-cut placement algorithms
DAC '77 Proceedings of the 14th Design Automation Conference
Bristle Blocks: A silicon compiler
DAC '79 Proceedings of the 16th Design Automation Conference
Placement and routing algorithms for hierarchical integrated circuit layout
Placement and routing algorithms for hierarchical integrated circuit layout
Understanding hierarchical design
Understanding hierarchical design
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The paper presents an IC-layout assembler which is capable of transforming the structural description of a system into general chip layout expressed in CIF. The chip assembly is based on the efferent decision flow. The process is one of gradual refinement of the starting domain yielding successively lower level chip components down to the primitives.