Fat-trees: universal networks for hardware-efficient supercomputing
IEEE Transactions on Computers
Architecture of a message-driven processor
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
A VLSI Architecture for Concurrent Data Structures
A VLSI Architecture for Concurrent Data Structures
Computer Networks
Introduction to VLSI Systems
A large scale, homogeneous, fully distributed parallel machine, I
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
A 2n-2 step algorithm for routing in an nxn array with constant size queues
SPAA '89 Proceedings of the first annual ACM symposium on Parallel algorithms and architectures
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
An overview of supertoroidal networks
SPAA '91 Proceedings of the third annual ACM symposium on Parallel algorithms and architectures
The Twisted N-Cube with Application to Multiprocessing
IEEE Transactions on Computers
Express Cubes: Improving the Performance of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
Executing DSP Applications in a Fine-Grained Dataflow Environment
IEEE Transactions on Software Engineering
The K2 distributed memory parallel processor: architecture, compiler, and operating system
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
Planar-adaptive routing: low-cost adaptive networks for multiprocessors
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
The turn model for adaptive routing
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
The impact of communication locality on large-scale multiprocessor performance
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Evaluation of compiler generated parallel programs on three multicomputers
ICS '92 Proceedings of the 6th international conference on Supercomputing
LogP: towards a realistic model of parallel computation
PPOPP '93 Proceedings of the fourth ACM SIGPLAN symposium on Principles and practice of parallel programming
Models of machines and computation for mapping in multicomputers
ACM Computing Surveys (CSUR)
Fast deflection routing for packets and worms
PODC '93 Proceedings of the twelfth annual ACM symposium on Principles of distributed computing
The J-machine multicomputer: an architectural evaluation
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Improving AP1000 parallel computer performance with message communication
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Designing interconnection networks for multi-level packaging
Proceedings of the 1993 ACM/IEEE conference on Supercomputing
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
The turn model for adaptive routing
Journal of the ACM (JACM)
Planar-adaptive routing: low-cost adaptive networks for multiprocessors
Journal of the ACM (JACM)
Performance prediction of parallel systems with scalable specifications—methodology and case study
ACM SIGMETRICS Performance Evaluation Review
Optimal and Suboptimal Processor Allocation for Hypercycle-based Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
The SP2 high-performance switch
IBM Systems Journal
Flexible oblivious router architecture
IBM Journal of Research and Development
On characterizing bandwidth requirements of parallel applications
Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Petri net modeling of interconnection networks for massively parallel architectures
ICS '95 Proceedings of the 9th international conference on Supercomputing
Circuit-Switched Broadcasting in Torus Networks
IEEE Transactions on Parallel and Distributed Systems
Efficient Termination Detection for Loosely Synchronous Applications in Multicomputers
IEEE Transactions on Parallel and Distributed Systems
A Theory of Wormhole Routing in Parallel Computers
IEEE Transactions on Computers
Optimal Layouts of Midimew Networks
IEEE Transactions on Parallel and Distributed Systems
Designing Clustered Multiprocessor Systems under Packaging and Technological Advancements
IEEE Transactions on Parallel and Distributed Systems
On the benefit of supporting virtual channels in wormhole routers
Proceedings of the eighth annual ACM symposium on Parallel algorithms and architectures
On the communication throughput of buffered multistage interconnection networks
Proceedings of the eighth annual ACM symposium on Parallel algorithms and architectures
ICS '96 Proceedings of the 10th international conference on Supercomputing
Efficient Discrete-Event Simulation of Colored Petri Nets
IEEE Transactions on Software Engineering - Special issue: best papers of the sixth international workshop on Petri nets and performance models (PNPM'95)
Parallel Divide and Conquer on Meshes
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
A Traffic-Balanced Adaptive Wormhole Routing Scheme for Two-Dimensional Meshes
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
Performance Analysis of Buffering Schemes in Wormhole Routers
IEEE Transactions on Computers
PP-MESS-SIM: A Flexible and Extensible Simulator for Evaluating Multicomputer Networks
IEEE Transactions on Parallel and Distributed Systems
Toward a More Realistic Performance Evaluation of Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
Scalable Global and Local Hashing Strategies for Duplicate Pruning in Parallel A* Graph Search
IEEE Transactions on Parallel and Distributed Systems
Depth contention-free broadcasting on torus networks
ICS '98 Proceedings of the 12th international conference on Supercomputing
PAVLOV: a programmable architecture for volume processing
HWWS '98 Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware
The turn model for adaptive routing
25 years of the international symposia on Computer architecture (selected papers)
Macro-Star Networks: Efficient Low-Degree Alternatives to Star Graphs
IEEE Transactions on Parallel and Distributed Systems
Wormhole routing techniques for directly connected multicomputer systems
ACM Computing Surveys (CSUR)
An Application-Driven Study of Parallel System Overheads and Network Bandwidth Requirements
IEEE Transactions on Parallel and Distributed Systems
The Offset Cube: A Three-Dimensional Multicomputer Network Topology Using Through-Wafer Optics
IEEE Transactions on Parallel and Distributed Systems
Low-level router design and its impact on supercomputer system performance
ICS '99 Proceedings of the 13th international conference on Supercomputing
A new method to make communication latency uniform: distributed routing balancing
ICS '99 Proceedings of the 13th international conference on Supercomputing
ICS '99 Proceedings of the 13th international conference on Supercomputing
Characterization of Deadlocks in k-ary n-Cube Networks
IEEE Transactions on Parallel and Distributed Systems
Fault-Tolerant Communication Algorithms in Toroidal Networks
IEEE Transactions on Parallel and Distributed Systems
A Performance Model for Duato's Fully Adaptive Routing Algorithm in k$k$-Ary n$n$-Cubes
IEEE Transactions on Computers
Performance-Based Constraints for Multidimensional Networks
IEEE Transactions on Parallel and Distributed Systems
On dynamic tree growing in hypercubes
SAC '97 Proceedings of the 1997 ACM symposium on Applied computing
Improving parallel system performance by changing the arrangement of the network links
Proceedings of the 14th international conference on Supercomputing
An Efficient Recognition-Complete Processor Allocation Strategy for k-ary n-cube Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
n-Dimensional Processor Arrays with Optical dBuses
The Journal of Supercomputing
Incremental Design of Scalable Interconnection Networks Using Basic Building Blocks
IEEE Transactions on Parallel and Distributed Systems
All-to-All Personalized Communication in Multidimensional Torus and Mesh Networks
IEEE Transactions on Parallel and Distributed Systems
The Multi-Level Communication: Efficient Routing for Interconnection Networks
The Journal of Supercomputing
An Analytical Model of Adaptive Wormhole Routing in Hypercubes in the Presence of Hot Spot Traffic
IEEE Transactions on Parallel and Distributed Systems
Unicast-based broadcast: an analysis for the hypercube with adaptive routing
Proceedings of the 2001 ACM symposium on Applied computing
Optimal Processor Mapping for Linear-Complement Communication on Hypercubes
IEEE Transactions on Parallel and Distributed Systems
Analytical Modeling of Wormhole-Routed k-Ary n-Cubes in the Presence of Hot-Spot Traffic
IEEE Transactions on Computers
Communication delay in wormhole-routed torus networks
Proceedings of the 2002 ACM symposium on Applied computing
A simple mathematical model of adaptive routing in wormhole k-ary n-cubes
Proceedings of the 2002 ACM symposium on Applied computing
Memory optimization in single chip network switch fabrics
Proceedings of the 39th annual Design Automation Conference
Locality-preserving randomized oblivious routing on torus networks
Proceedings of the fourteenth annual ACM symposium on Parallel algorithms and architectures
HiPER: A Compact Narrow Channel Router with Hop-by-Hop Error Correction
IEEE Transactions on Parallel and Distributed Systems
Modeling of interconnection subsystems for massively parallel computers
Performance Evaluation
The Journal of Supercomputing
A Comparative Study of Switching Methods in Multicomputer Networks
The Journal of Supercomputing
A distributed formation of smallest faulty orthogonal convex polygons in 2-D meshes
Journal of Parallel and Distributed Computing
On the area of hypercube layouts
Information Processing Letters
Hypermeshes: implementation and performance
Journal of Systems Architecture: the EUROMICRO Journal
On the merits of hypermeshes and tori with adaptive routing
Journal of Systems Architecture: the EUROMICRO Journal
Adaptive Routing for Dynamic Applications in Massively Parallel Architectures
IEEE Parallel & Distributed Technology: Systems & Technology
Hypercube Communication Delay with Wormhole Routing
IEEE Transactions on Computers
A Performance Model of Pipelined k-ary n-cubes
IEEE Transactions on Computers
The Performance of Crossbar-Based Binary Hypercubes
IEEE Transactions on Computers
Limits on Interconnection Network Performance
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Deadlock-Free Adaptive Routing in Multicomputer Networks Using Virtual Channels
IEEE Transactions on Parallel and Distributed Systems
The Impact of Pipelined Channels on k-ary n-Cube Networks
IEEE Transactions on Parallel and Distributed Systems
Performance Analysis of Mesh Interconnection Networks with Deterministic Routing
IEEE Transactions on Parallel and Distributed Systems
Concurrent Processing of Linearly Ordered Data Structures on Hypercube Multicomputers
IEEE Transactions on Parallel and Distributed Systems
Optimal Multicast Communication in Wormhole-Routed Torus Networks
IEEE Transactions on Parallel and Distributed Systems
All-To-All Communication with Minimum Start-Up Costs in 2D/3D Tori and Meshes
IEEE Transactions on Parallel and Distributed Systems
Alleviating Consumption Channel Bottleneck in Wormhole-Routed k-ary n-Cube Systems
IEEE Transactions on Parallel and Distributed Systems
Balancing Buffer Utilization in Meshes Using a 'Restricted Area' Concept
IEEE Transactions on Parallel and Distributed Systems
Communication in Parallel Applications: Characterization and Sensitivity Analysis
ICPP '97 Proceedings of the international Conference on Parallel Processing
An Improved Analytical Model for Wormhole Routed Networks with Application to Butterfly Fat-Trees
ICPP '97 Proceedings of the international Conference on Parallel Processing
Multidimensional Network Performance with Unidirectional Links
ICPP '97 Proceedings of the international Conference on Parallel Processing
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Adaptive Source Routing in Multistage Interconnection Networks
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
An Optical Interconnect Model for k-ary n-cube Wormhole Networks
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
A Hybrid Time Synchronization Implemented Through Special Ring Array for Mesh or Torus
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
An Accurate Model for the Performance Analysis of Deterministic Wormhole Routing
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
A Reliable Hardware Barrier Synchronization Scheme
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
Performance Analysis of Wormhole-Switched k-Ary n-Cubes with Bursty Traffic
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
ISHPC '00 Proceedings of the Third International Symposium on High Performance Computing
How Can We Design Better Networks for DSM Systems?
PCRCW '97 Proceedings of the Second International Workshop on Parallel Computer Routing and Communication
Bidirectional versus Unidirectional Networks: Cost/Performance Trade-Offs
MASCOTS '95 Proceedings of the 3rd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
Performance Analysis of Wormhole Switching with Adaptive Routing in a Two-Dimensional Torus
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
A Parallel Algorithm for Lagrange Interpolation on k-ary n-Cubes
ParNum '99 Proceedings of the 4th International ACPC Conference Including Special Tracks on Parallel Numerics and Parallel Computing in Image Processing, Video Processing, and Multimedia: Parallel Computation
On the Design of a High-Performance Adaptive Router for CC-NUMA Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Analysis of k-ary n-cubes with dimension-ordered routing
Future Generation Computer Systems - Selected papers from CCGRID 2002
A3: a simple and asymptotically accurate model for parallel computation
FRONTIERS '96 Proceedings of the 6th Symposium on the Frontiers of Massively Parallel Computation
Communication Delay in Wormhole-Switched Tori Networks under Bursty Workloads
The Journal of Supercomputing
Efficient and balanced adaptive routing in two-dimensional meshes
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Abstracting network characteristics and locality properties of parallel systems
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Modeling virtual channel flow control in hypercubes
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
The Shuffle-Ring: Overcoming the Increasing Degree of Hypercube
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
Model Validation of a Wormhole Router System
HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
Analysis of Buffer Design for Adaptive Routing in Direct Networks
MASCOTS '96 Proceedings of the 4th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
PAS '97 Proceedings of the 2nd AIZU International Symposium on Parallel Algorithms / Architecture Synthesis
Efficient simulation of SWN models
PNPM '95 Proceedings of the Sixth International Workshop on Petri Nets and Performance Models
Design of a highly reconfigurable interconnect for array processors
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
ZOMA: A Preemptive Deadlock Recovery Mechanism for Fully Adaptive Routing in Wormhole Networks
ICCNMC '01 Proceedings of the 2001 International Conference on Computer Networks and Mobile Computing (ICCNMC'01)
A Performance Model of Adaptive Routing in k-Ary n-Cubes with Matrix-Transpose Traffic
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
GOAL: a load-balanced adaptive routing algorithm for torus networks
Proceedings of the 30th annual international symposium on Computer architecture
On k-ary n-cubes: theory and applications
Discrete Applied Mathematics - Special issue: Algorithmic aspects of communication
Analytical modelling of wormhole-routed k-ary n-cubes in the presence of matrix-transpose traffic
Journal of Parallel and Distributed Computing
A queueing model for wormhole routing with timeout
ICCCN '95 Proceedings of the 4th International Conference on Computer Communications and Networks
Velocity and distance of neighbourhood sequences
Acta Cybernetica
An analytical model of wormhole-routed hypercubes under broadcast traffic
Performance Evaluation
Performance prediction of wormhole switching in hypercubes with bursty traffic pattern
Proceedings of the 2003 ACM symposium on Applied computing
Power-driven Design of Router Microarchitectures in On-chip Networks
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Modeling Latency in Deterministic Wormhole-Routed Hypercubes under Hot-Spot Traffic
The Journal of Supercomputing
Incomplete k-ary n-cube and its derivatives
Journal of Parallel and Distributed Computing
Analysis of true fully adaptive routing with software-based deadlock recovery
Journal of Systems and Software - Special issue: Computer systems
Analytically Modeling a Fault-Tolerant Messaging Protocol
IEEE Transactions on Computers
Adaptive channel queue routing on k-ary n-cubes
Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures
High-level power analysis for on-chip networks
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
On the performance of multicomputer interconnection networks
Journal of Systems Architecture: the EUROMICRO Journal
Performance Evaluation - Special issue: Distributed systems performance
Merrimac: Supercomputing with Streams
Proceedings of the 2003 ACM/IEEE conference on Supercomputing
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 14 - Volume 15
The Effect of Virtual Channel Organization on the Performance of Interconnection Networks
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 14 - Volume 15
Analytical Modelling of Hot-Spot Traffic in Deterministically-Routed K-Ary N-Cubes
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 15 - Volume 16
Issues in the development of a practical NoC: the Proteo concept
Integration, the VLSI Journal - Special issue: Networks on chip and reconfigurable fabrics
Comparative Modeling of Network Topologies and Routing Strategies in Multicomputers
International Journal of High Performance Computing Applications
Quality-of-service and error control techniques for mesh-based network-on-chip architectures
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
The recursive transpose-connected cycles (RTCC) interconnection network for multiprocessors
Proceedings of the 2005 ACM symposium on Applied computing
Microarchitecture of a High-Radix Router
Proceedings of the 32nd annual international symposium on Computer Architecture
IEEE Transactions on Parallel and Distributed Systems
Performance analysis of a QoS capable cluster interconnect
Performance Evaluation - Performance modelling and evaluation of high-performance parallel and distributed systems
Compiler-directed proactive power management for networks
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Quasi-perfect resource placements for two-dimensional toroidal networks
Journal of Parallel and Distributed Computing
Application-specific buffer space allocation for networks-on-chip router design
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Communication-driven task binding for multiprocessor with latency insensitive network-on-chip
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Stochastic Analysis of Deterministic Routing Algorithms in the Presence of Self-Similar Traffic
The Journal of Supercomputing
Compiler-directed voltage scaling on communication links for reducing power consumption
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Efficient link capacity and QoS design for network-on-chip
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A survey of research and practices of Network-on-chip
ACM Computing Surveys (CSUR)
Routing performance enhancement in hierarchical torus network by link-selection algorithm
Journal of Parallel and Distributed Computing - Special issue: Design and performance of networks for super-, cluster-, and grid-computing: Part II
The BlackWidow High-Radix Clos Network
Proceedings of the 33rd annual international symposium on Computer Architecture
Interconnection Networks for Scalable Quantum Computers
Proceedings of the 33rd annual international symposium on Computer Architecture
Switch fabric design for high performance IP routers: a survey
Journal of Systems Architecture: the EUROMICRO Journal
A performance model of compressionless routing in k-ary n-cube networks
Performance Evaluation
Hamming hypermeshes: high performance interconnection networks for pin-out limited systems
Performance Evaluation
Generalized methods for algorithm development on optical systems
The Journal of Supercomputing
Adaptive routing in high-radix clos network
Proceedings of the 2006 ACM/IEEE conference on Supercomputing
Modelling and simulation of off-chip communication architectures for high-speed packet processors
Journal of Systems and Software
Flattened butterfly: a cost-efficient topology for high-radix networks
Proceedings of the 34th annual international symposium on Computer architecture
Sequencing of Concurrent Communication Traffic in a Mesh Multicomputer with Virtual Channels
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
A Comparative Performance Study of an Interconnection Cached Network
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Analytical router modeling for networks-on-chip performance analysis
Proceedings of the conference on Design, automation and test in Europe
Mathematical performance modelling of adaptive wormhole routing in optoelectronic hypercubes
Journal of Parallel and Distributed Computing
Microprocessors & Microsystems
An efficient delay-optimal distributed termination detection algorithm
Journal of Parallel and Distributed Computing
Dynamic channel selection: an efficient strategy for balancing traffic in meshes
International Journal of Computational Science and Engineering
International Journal of High Performance Computing and Networking
Age-based packet arbitration in large-radix k-ary n-cubes
Proceedings of the 2007 ACM/IEEE conference on Supercomputing
Pipelined circuit switching: Analysis for the torus with non-uniform traffic
Journal of Systems Architecture: the EUROMICRO Journal
Architectural designs for a scalable reconfigurable IP router
Journal of Systems Architecture: the EUROMICRO Journal
Combinatorial performance modelling of toroidal cubes
Journal of Systems Architecture: the EUROMICRO Journal
Journal of High Speed Networks
High performance architectures for Chip-to-Chip Communications on Network Line Cards
Journal of High Speed Networks
3-D topologies for networks-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Analytic performance comparison of hypercubes and star graphs with implementation constraints
Journal of Computer and System Sciences
Parallel Lagrange interpolation on k-ary n-cubes with maximum channel utilization
The Journal of Supercomputing
TTPM - An efficient deadlock-free algorithm for multicast communication in 2D torus networks
Journal of Systems Architecture: the EUROMICRO Journal
An empirical study of hierarchical division for mesh-structured networks
Journal of Computational Methods in Sciences and Engineering - Selected papers from the International Conference on Computer Science, Software Engineering, Information Technology, e-Business, and Applications, 2004
Three-dimensional Integrated Circuit Design
Three-dimensional Integrated Circuit Design
Future Generation Computer Systems
Advancing supercomputer performance through interconnection topology synthesis
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Synthesis of networks on chips for 3D systems on chips
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Off-chip communication architectures for high throughput network processors
Computer Communications
Research on next-generation scalable routers implemented with H-Torus topology
Journal of Computer Science and Technology
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Proceedings of the 23rd international conference on Supercomputing
Synthesis of predictable networks-on-chip-based interconnect architectures for chip multiprocessors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scalability of network-on-chip communication architecture for 3-D meshes
NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
Computers and Electrical Engineering
Resource placement in three-dimensional tori
Parallel Computing
Upper bounds on the queuenumber of k-ary n-cubes
Information Processing Letters
A unified formulation of Kautz network and generalized hypercube
Computers & Mathematics with Applications
From 2D to 3D NoCs: a case study on worst-case communication performance
Proceedings of the 2009 International Conference on Computer-Aided Design
An accurate and efficient performance analysis approach based on queuing model for Network on Chip
Proceedings of the 2009 International Conference on Computer-Aided Design
A performance analysis framework for routing lookup in scalable routers
ICOIN'09 Proceedings of the 23rd international conference on Information Networking
Quality-of-service and error control techniques for mesh-based network-on-chip architectures
Integration, the VLSI Journal - Special issue: ACM great lakes symposium on VLSI
Balancing traffic in meshes by dynamic channel selection
ISPA'03 Proceedings of the 2003 international conference on Parallel and distributed processing and applications
An analytical method for evaluating network-on-chip performance
Proceedings of the Conference on Design, Automation and Test in Europe
Performance modeling of n-dimensional mesh networks
Performance Evaluation
Information Sciences: an International Journal
SunFloor 3D: a tool for networks on chip topology synthesis for 3D systems on chips
Proceedings of the Conference on Design, Automation and Test in Europe
Power-performance analysis of networks-on-chip with arbitrary buffer allocation schemes
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special section on the ACM IEEE international conference on formal methods and models for codesign (MEMOCODE) 2009
Routing to support communication in dependable networks
EUROMICRO-PDP'02 Proceedings of the 10th Euromicro conference on Parallel, distributed and network-based processing
Performance evaluation of wormhole routed network processor-memory interconnects
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
A comparative performance analysis of n-cubes and star graphs
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Sunfloor 3D: a tool for networks on chip topology synthesis for 3-D systems on chips
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An analytical approach for network-on-chip performance analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Modeling the effects of hot-spot traffic load on the performance of wormhole-switched hypermeshes
Computers and Electrical Engineering
Fast and efficient processor allocation algorithm for torus-based chip multiprocessors
Computers and Electrical Engineering
Microprocessors & Microsystems
An analytical model for Network-on-Chip with finite input buffer
Frontiers of Computer Science in China
Static timing analysis for modeling QoS in networks-on-chip
Journal of Parallel and Distributed Computing
A learning-based approach to the automated design of MPSoC networks
ARCS'11 Proceedings of the 24th international conference on Architecture of computing systems
A dynamically reconfigurable interconnect for array processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
VLSI considerations for TESH: a new hierarchical interconnection network for 3-D integration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Optimal network architectures for minimizing average distance in k-ary n-dimensional mesh networks
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Worst-case end-to-end delays evaluation for SpaceWire networks
Discrete Event Dynamic Systems
Hamiltonian cycles passing through linear forests in k-ary n-cubes
Discrete Applied Mathematics
Energy characteristic of a processor allocator and a network-on-chip
International Journal of Applied Mathematics and Computer Science - SPECIAL SECTION: Efficient Resource Management for Grid-Enabled Applications
The Journal of Supercomputing
Analytic performance modeling of a fully adaptive routing algorithm in the torus
ISPA'05 Proceedings of the Third international conference on Parallel and Distributed Processing and Applications
Edge fault tolerance of super edge connectivity for three families of interconnection networks
Information Sciences: an International Journal
LBSR: a load-balanced semiminimal routing algorithm in cellular routers
ICOIN'06 Proceedings of the 2006 international conference on Information Networking: advances in Data Communications and Wireless Networks
PaCT'05 Proceedings of the 8th international conference on Parallel Computing Technologies
Efficient grid on the OTIS-Arrangment network
ICA3PP'10 Proceedings of the 10th international conference on Algorithms and Architectures for Parallel Processing - Volume Part II
Fault-tolerant diameter for three family interconnection networks
Journal of Combinatorial Optimization
Interconnection network front-end controller combining to reduce hot spots effects
Computer Communications
Mathematical and Computer Modelling: An International Journal
Bisection (band)width of product networks with application to data centers
TAMC'12 Proceedings of the 9th Annual international conference on Theory and Applications of Models of Computation
An accurate performance model for network-on-chip and multicomputer interconnection networks
Journal of Parallel and Distributed Computing
Journal of Parallel and Distributed Computing
High and stable performance under adverse traffic patterns of tori-connected torus network
Computers and Electrical Engineering
Scalable high-radix router microarchitecture using a network switch organization
ACM Transactions on Architecture and Code Optimization (TACO)
Fault-free Hamiltonian cycles passing through a linear forest in ternary n-cubes with faulty edges
Theoretical Computer Science
On the topological properties of HyperX
The Journal of Supercomputing
| Hi-index | 15.02 |
VLSI communication networks are wire-limited, i.e. the cost of a network is not a function of the number of switches required, but rather a function of the wiring density required to construct the network. Communication networks of varying dimensions are analyzed under the assumption of constant wire bisection. Expressions for the latency, average case throughput, and hot-spot throughput of k-ary n-cube networks with constant bisection that agree closely with experimental measurements are derived. It is shown that low-dimensional networks (e.g. tori) have lower latency and higher hot-spot throughput than high-dimensional networks (e.g. binary n-cubes) with the same bisection width.