A transputer network for fast operations on digitised images
Computer Graphics Forum
Performance Analysis of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
Journal of Parallel and Distributed Computing
Planar-adaptive routing: low-cost adaptive networks for multiprocessors
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
A comprehensive analytical model for wormhole routing in multicomputer systems
Journal of Parallel and Distributed Computing
IEEE Transactions on Parallel and Distributed Systems
Dynamically Configurable Message Flow Control for Fault-Tolerant Routing
IEEE Transactions on Parallel and Distributed Systems
APRIL: a processor architecture for multiprocessing
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
A Performance Model for Duato's Fully Adaptive Routing Algorithm in k$k$-Ary n$n$-Cubes
IEEE Transactions on Computers
Software-Based Rerouting for Fault-Tolerant Pipelined Communication
IEEE Transactions on Parallel and Distributed Systems
A scalable content-addressable network
Proceedings of the 2001 conference on Applications, technologies, architectures, and protocols for computer communications
Performance of multi-hop commmunications using logical topologies on optical torus networks
Journal of Parallel and Distributed Computing
Interconnection Networks: An Engineering Approach
Interconnection Networks: An Engineering Approach
Limits on Interconnection Network Performance
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Parallel Edge-Region-Based Segmentation Algorithm Targeted at Reconfigurable MultiRing Network
The Journal of Supercomputing
Principles and Practices of Interconnection Networks
Principles and Practices of Interconnection Networks
Basic Concepts and Taxonomy of Dependable and Secure Computing
IEEE Transactions on Dependable and Secure Computing
Theory, Volume 1, Queueing Systems
Theory, Volume 1, Queueing Systems
Characterization of spatial fault patterns in interconnection networks
Parallel Computing
A Class of Partially Adaptive Routing Algorithms for n_dimensional Meshes
ICPP '93 Proceedings of the 1993 International Conference on Parallel Processing - Volume 03
Performance analysis of fault-tolerant routing algorithm in wormhole-switched interconnections
The Journal of Supercomputing
ICCS '08 Proceedings of the 8th international conference on Computational Science, Part I
Introduction to Algorithms, Third Edition
Introduction to Algorithms, Third Edition
Topological Structure and Analysis of Interconnection Networks
Topological Structure and Analysis of Interconnection Networks
Pipelined circuit-switching: a fault-tolerant variant of wormhole routing
SPDP '92 Proceedings of the 1992 Fourth IEEE Symposium on Parallel and Distributed Processing
Distributed stereo-correlation algorithm
Computer Communications
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In many environments, rather than minimizing message latency or maximizing network performance, the ability to survive beyond the failure of individual network components is the main issue of interests. The nature of Wormhole Switching (WS) leads to high network throughput and low message latencies. However, in the vicinity of faulty regions, these behaviors cause rapid congestion, provoking the network becomes deadlocked. While techniques such as adaptive routing can alleviate the problem, they cannot completely solve the problem. Thus, there have been extreme studies on other types of switching mechanisms in networking and multicomputers communities. In this paper, we present a general mathematical model to assess the relative performance merits of three well-known fault-tolerant switching methods in tori, namely Scouting Switching (SS), Pipelined Circuit Switching (PCS), and Circuit Switching (CS). We have carried out extensive simulation experiments, the results of which are used to validate the proposed analytical models. We have also conducted an extensive comparative performance analysis, by means of analytical modeling, of SS, PCS, and CS under various working conditions. The analytical results reveal that SS shows substantial performance improvements for low to moderate failure rates over PCS and CS, which achieves close to WS performance. PCS can provide superior performance over CS and behaves the same or in some occasions worse than SS, under light and moderate traffic, especially with the same hardware requirements.