Communications of the ACM - Special section on computer architecture
Routing, merging, and sorting on parallel models of computation
Journal of Computer and System Sciences
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
The architecture and programming of the Ametek series 2010 multicomputer
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
A framework for adaptive routing in multicomputer networks
SPAA '89 Proceedings of the first annual ACM symposium on Parallel algorithms and architectures
A framework for adaptive routing in multicomputer networks
A framework for adaptive routing in multicomputer networks
Performance Analysis of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
Adaptive, minimal routing in hypercubes
AUSCRYPT '90 Proceedings of the sixth MIT conference on Advanced research in VLSI
On the design of deadlock-free adaptive routing algorithms for multicomputers: design methodologies
PARLE '91 Proceedings on Parallel architectures and languages Europe : volume I: parallel architectures and algorithms: volume I: parallel architectures and algorithms
An Adaptive and Fault Tolerant Wormhole Routing Strategy for k-ary n-cubes
IEEE Transactions on Computers
Race-free interconnection networks and multiprocessor consistency
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Chaos router: architecture and performance
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Fully-adaptive routing: packet switching performance and wormhole algorithms
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
Planar-adaptive routing: low-cost adaptive networks for multiprocessors
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
The turn model for adaptive routing
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Adaptive deadlock- and livelock-free routing with all minimal paths in Torus networks
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
A VLSI Architecture for Concurrent Data Structures
A VLSI Architecture for Concurrent Data Structures
Limits on Interconnection Network Performance
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Deadlock-Free Adaptive Routing in Multicomputer Networks Using Virtual Channels
IEEE Transactions on Parallel and Distributed Systems
A Traffic-Balanced Adaptive Wormhole Routing Scheme for Two-Dimensional Meshes
IEEE Transactions on Computers
A Theory of Fault-Tolerant Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Impact of selection functions on routing algorithm performance in multicomputer networks
ICS '97 Proceedings of the 11th international conference on Supercomputing
Performance benefits of virtual channels and adaptive routing: an application-driven study
ICS '97 Proceedings of the 11th international conference on Supercomputing
Wormhole routing techniques for directly connected multicomputer systems
ACM Computing Surveys (CSUR)
Dynamically Configurable Message Flow Control for Fault-Tolerant Routing
IEEE Transactions on Parallel and Distributed Systems
A Testbed for Evaluation of Fault-Tolerant Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Parallel and Distributed Systems
The Odd-Even Turn Model for Adaptive Routing
IEEE Transactions on Parallel and Distributed Systems
Analysis of Distributed Routing Balancing behavior
Proceedings of the 2002 ACM symposium on Applied computing
ICS '02 Proceedings of the 16th international conference on Supercomputing
A distributed formation of smallest faulty orthogonal convex polygons in 2-D meshes
Journal of Parallel and Distributed Computing
Impact of Virtual Channels and Adaptive Routing on Application Performance
IEEE Transactions on Parallel and Distributed Systems
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
An Accurate Model for the Performance Analysis of Deterministic Wormhole Routing
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
A Simple Incremental Network Topology for Wormhole Switch-Based Networks
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
A Fault-Tolerant Adaptive and Minimal Routing Approach in n-D Meshes
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
A simple fault-tolerant adaptive and minimal routing approach in 3-D meshes
Journal of Computer Science and Technology
A Fault-Tolerant and Deadlock-Free Routing Protocol in 2D Meshes Based on Odd-Even Turn Model
IEEE Transactions on Computers
A New Approach to Fault-Tolerant Wormhole Routing for Mesh-Connected Parallel Computers
IEEE Transactions on Computers
FRoots: A Fault Tolerant and Topology-Flexible Routing Technique
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Quasi-global routing for fault-tolerant high-performance interconnection networks
PDCN'07 Proceedings of the 25th conference on Proceedings of the 25th IASTED International Multi-Conference: parallel and distributed computing and networks
A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
Proceedings of the 45th annual Design Automation Conference
Breaking adaptive multicast deadlock by virtual channel address/data FIFO decoupling
Proceedings of the 2nd International Workshop on Network on Chip Architectures
Mesh-based many-core performance under process variations: a core yield perspective
ACM SIGARCH Computer Architecture News
A routing methodology for dynamic fault tolerance in meshes and tori
HiPC'07 Proceedings of the 14th international conference on High performance computing
Analytical performance modelling of partially adaptive routing in wormhole hypercubes
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Network-on-Chip routing algorithms by breaking cycles
ICA3PP'10 Proceedings of the 10th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
Mathematical and Computer Modelling: An International Journal
AFRA: a low cost high performance reliable routing for 3D mesh NoCs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Bi-LCQ: A low-weight clustering-based Q-learning approach for NoCs
Microprocessors & Microsystems
Graceful deadlock-free fault-tolerant routing algorithm for 3D Network-on-Chip architectures
Journal of Parallel and Distributed Computing
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Network throughput can be increased by allowing multipath, adaptive routing. Adaptive routing allows more freedom in the paths taken by messages, spreading load over physical channels more evenly. The flexibility of adaptive routing introduces new possibilities of deadlock. Previous deadlock avoidance schemes in k-ary n-cubes require an exponential number of virtual channels. We describe a family of deadlock-free routing algorithms, called planar-adaptive routing algorithms, that require only a constant number of virtual channels, independent of networks size and dimension. Planar-adaptive routing algorithms reduce the complexity of deadlock prevention by reducing the number of choices at each routing step. In the fault-free case, planar-adaptive networks are guaranteed to be deadlock-free. In the presence of network faults, the planar-adaptive router can be extended with misrouting to produce a working network which remains provably deadlock free and is provably livelock free. In addition, planar-adaptive networks can simultaneously support both in-order and adaptive, out-of-order packet delivery.Planar-adaptive routing is of practical significance. It provides the simplest known support for deadlock-free adaptive routing in k-ary n-cubes of more than two dimensions (with k2). Restricting adaptivity reduces the hardware complexity, improving router speed or allowing additional performance-enhancing network features. The structure of planar-adaptive routers is amenable to efficient implementation.Simulation studies show that planar-adaptive routers can increase the robustness of network throughput for nonuniform communication patterns. Planar-adaptive routers outperform deterministic routers with equal hardware resources. Further, adding virtual lanes to planar-adaptive routers increases this advantage. Comparisons with fully adaptive routers show that planar-adaptive routers, limited adaptive routers, can give superior performance. These results indicate the best way to allocate router resources to combine adaptivity and virtual lanes.Planar-adaptive routers are a special case of limited adaptivity routers. We define a class of adaptive routers with f degrees of routing freedom. This class, termed f-flat adaptive routers, allows a direct cost-performance tradeoff between implementation cost (speed and silicon area) and routing freedom (channel utilization). For a network of a particular dimension, the cost of adaptivity grows linearly with the routing freedom. However, the rate of growth is a much larger constant for high-dimensional networks. All of the properties proven for planar-adaptive routers, such as deadlock and livelock freedom, also apply to f-flat adaptive routers.