Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
A Group-Theoretic Model for Symmetric Interconnection Networks
IEEE Transactions on Computers
The de Bruijn Multiprocessor Network: A Versatile Parallel Processing and Sorting Network for VLSI
IEEE Transactions on Computers
High performance communications in processor networks
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
Performance Analysis of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
An Adaptive and Fault Tolerant Wormhole Routing Strategy for k-ary n-cubes
IEEE Transactions on Computers
Chaos router: architecture and performance
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
The Stanford Dash Multiprocessor
Computer
The network architecture of the Connection Machine CM-5 (extended abstract)
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
The J-machine multicomputer: an architectural evaluation
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
A comparison of adaptive wormhole routing algorithms
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
The turn model for adaptive routing
Journal of the ACM (JACM)
Improving the efficiency of virtual channels with time-dependent selection functions
Conference proceedings on PARLE'92
Adaptive Deadlock- and Livelock-Free Routing with All Minimal Paths in Torus Networks
IEEE Transactions on Parallel and Distributed Systems
Compressionless routing: a framework for adaptive and fault-tolerant routing
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
A comprehensive analytical model for wormhole routing in multicomputer systems
Journal of Parallel and Distributed Computing
Planar-adaptive routing: low-cost adaptive networks for multiprocessors
Journal of the ACM (JACM)
A Family of Fault-Tolerant Routing Protocols for Direct Multiprocessor Networks
IEEE Transactions on Parallel and Distributed Systems
IBM Systems Journal
Optimal fully adaptive minimal wormhole routing for meshes
Journal of Parallel and Distributed Computing
Network performance under bimodal traffic loads
Journal of Parallel and Distributed Computing
An efficient, fully adaptive deadlock recovery scheme: DISHA
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Configurable flow control mechanisms for fault-tolerant routing
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
A Framework for Designing Deadlock-Free Wormhole Routing Algorithms
IEEE Transactions on Parallel and Distributed Systems
A necessary and sufficient condition for deadlock-free wormhole routing
Journal of Parallel and Distributed Computing
A Traffic-Balanced Adaptive Wormhole Routing Scheme for Two-Dimensional Meshes
IEEE Transactions on Computers
On deadlocks in interconnection networks
Proceedings of the 24th annual international symposium on Computer architecture
Fault-Tolerant Wormhole Routing Algorithms for Mesh Networks
IEEE Transactions on Computers
Limits on Interconnection Network Performance
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Deadlock-Free Adaptive Routing in Multicomputer Networks Using Virtual Channels
IEEE Transactions on Parallel and Distributed Systems
Performance Analysis of Mesh Interconnection Networks with Deterministic Routing
IEEE Transactions on Parallel and Distributed Systems
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
Architecture and Implementation of Vulcan
Proceedings of the 8th International Symposium on Parallel Processing
Deadlock-Free Adaptive Routing Algorithms for the 3D-Torus: Limitations and Solutions
PARLE '93 Proceedings of the 5th International PARLE Conference on Parallel Architectures and Languages Europe
Optimized Routing in the Cray T3D
PCRCW '94 Proceedings of the First International Workshop on Parallel Computer Routing and Communication
Performance Evaluation of Adaptive Routing Algorithms for k-ary-n-cubes
PCRCW '94 Proceedings of the First International Workshop on Parallel Computer Routing and Communication
Support for Multiple Classes of Traffic in Multicomputer Routers
PCRCW '94 Proceedings of the First International Workshop on Parallel Computer Routing and Communication
The Reliable Router: A Reliable and High-Performance Communication Substrate for Parallel Computers
PCRCW '94 Proceedings of the First International Workshop on Parallel Computer Routing and Communication
Routing Algorithms for IBM SP1
PCRCW '94 Proceedings of the First International Workshop on Parallel Computer Routing and Communication
Scouting: Fully Adaptive, Deadlock-Free Routing in Faulty Pipelined Networks
Proceedings of the 1994 International Conference on Parallel and Distributed Systems
A Thory of Fault-Tolerant routing in Wormhole Networks
Proceedings of the 1994 International Conference on Parallel and Distributed Systems
Origin-based fault-tolerant routing in the mesh
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Efficient and balanced adaptive routing in two-dimensional meshes
HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
Efficient deadlock-free wormhole routing in shuffle based networks
SPDP '95 Proceedings of the 7th IEEE Symposium on Parallel and Distributeed Processing
Four-Ary Tree-Based Barrier Synchronization for 2D Meshes without Nonmember Involvement
IEEE Transactions on Computers - Special issue on the parallel architecture and compilation techniques conference
Expanding and forwarding parameters of product graphs
Discrete Applied Mathematics - Discrete mathematics and theoretical computer science (DMTCS)
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
HERMES: an infrastructure for low area overhead packet-switching networks on chip
Integration, the VLSI Journal - Special issue: Networks on chip and reconfigurable fabrics
Compiler-directed channel allocation for saving power in on-chip networks
Conference record of the 33rd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Topology-aware tile mapping for clusters of SMPs
Proceedings of the 3rd conference on Computing frontiers
A deadlock detection mechanism for true fully adaptive routing in regular wormhole networks
Computer Communications
Architecture of the Scalable Communications Core
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Path-based multicasting in multicomputers
PDCN'07 Proceedings of the 25th conference on Proceedings of the 25th IASTED International Multi-Conference: parallel and distributed computing and networks
International Journal of High Performance Computing and Networking
A new selection policy for adaptive routing in network on chip
EHAC'06 Proceedings of the 5th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications
Static timing analysis for modeling QoS in networks-on-chip
Journal of Parallel and Distributed Computing
An energy- and buffer-aware fully adaptive routing algorithm for Network-on-Chip
Microelectronics Journal
Hi-index | 0.00 |
Wormhole routing has emerged as the most widely used switching technique in massively parallel computers. We present a detailed survey of various techniques for enhancing the performance and reliability of wormhole-routing schemes in directly connected networks. We start with an overview of the direct network topologies and a comparison of various switching techniques. Next, the characteristics of the wormhole routing mechanism are described in detail along with the theory behind deadlock-free routing. The performance of routing algorithms depends on the selection of the path between the source and the destination, the network traffic, and the router design. The routing algorithms are implemented in the router chips. We outline the router characteristics and describe the functionality of various elements of the router. Depending on the usage of paths between the source and the destination, routing algorithms are classified as deterministic, fully adaptive, and partially adaptive. We discuss several representative algorithms for all these categories. The algorithms within each category vary in terms of resource requirements and performance under various traffic conditions. The main difference among various adaptive routing schemes is the technique used to avoid deadlocks. We also discuss a few algorithms based on deadlock recovery techniques. Along with performance, fault tolerance is essential for message routing in multicomputers, and we thus discuss several fault-tolerant wormhole routing algorithms along with their fault-handling capabilities. These routing schemes enable a message to reach its destination even in the presence of faults in the network. The implementation details of wormhole routing algorithms in contemporary commercial systems are also discussed. We conclude by itemizing several future directions and open issues.