Communications of the ACM - Special section on computer architecture
Fault-Tolerant Routing in DeBruijn Comrnunication Networks
IEEE Transactions on Computers
The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
Bounds to Complexities of Networks for Sorting and for Switching
Journal of the ACM (JACM)
Parallel permutation and sorting algorithms and a new generalized connection network
Journal of the ACM (JACM)
The de Bruijn multiprocessor network: a versatile sorting network
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
The cube-connected cycles: a versatile network for parallel computation
Communications of the ACM
Sorting on a mesh-connected parallel computer
Communications of the ACM
Introduction to VLSI Systems
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Doubly twisted torus networks for VLSI processor arrays
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
New layouts for the shuffle-exchange graph(Extended Abstract)
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
An efficient VLSI dictionary machine
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Fault-secure algorithms for multiple-processor systems
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
A multiprocessor network suitable for single-chip VLSI implementation
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Tight bounds on the complexity of parallel sorting
STOC '84 Proceedings of the sixteenth annual ACM symposium on Theory of computing
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
De bruijn communications networks.
De bruijn communications networks.
The tree machine: a highly concurrent computing environment
The tree machine: a highly concurrent computing environment
A complexity theory for VLSI
Density and reliability of interconnection topologies for multicomputers
Density and reliability of interconnection topologies for multicomputers
Wafer-scale integration of systolic arrays
SFCS '82 Proceedings of the 23rd Annual Symposium on Foundations of Computer Science
Load balanced deadlock-free deterministic routing of arbitrary networks
CSC '92 Proceedings of the 1992 ACM annual conference on Communications
A VLSI decomposition of the deBruijn graph
Journal of the ACM (JACM)
Fault-Tolerant Ring Embedding in de Bruijn Networks
IEEE Transactions on Computers
Folded Petersen Cube Networks: New Competitors for the Hypercubes
IEEE Transactions on Parallel and Distributed Systems
A Framework for Designing Deadlock-Free Wormhole Routing Algorithms
IEEE Transactions on Parallel and Distributed Systems
A New Family of Cayley Graph Interconnection Networks of Constant Degree Four
IEEE Transactions on Parallel and Distributed Systems
An O(nlogn)-size fault-tolerant sorting network (extended abstract)
STOC '96 Proceedings of the twenty-eighth annual ACM symposium on Theory of computing
WICI: An Efficient Hybrid Routing Scheme for Scalable and Hierarchical Networks
IEEE Transactions on Computers
On Parallel Algorithms for Single-Fault Diagnosis in Fault Propagation Graph Systems
IEEE Transactions on Parallel and Distributed Systems
Distributed Ring Embedding in Faulty De Bruijn Networks
IEEE Transactions on Computers
An efficient multicast protocol using de Bruijn structure for mobile computing
ACM SIGCOMM Computer Communication Review
Efficient Routing and Sorting Schemes for de Bruijn Networks
IEEE Transactions on Parallel and Distributed Systems
A General Theory for Deadlock Avoidance in Wormhole-Routed Networks
IEEE Transactions on Parallel and Distributed Systems
Sep: A Fixed Degree Regular Network for MassivelyParallel Systems
The Journal of Supercomputing
Wormhole routing techniques for directly connected multicomputer systems
ACM Computing Surveys (CSUR)
Using Emulations to Enhance the Performance of Parallel Architectures
IEEE Transactions on Parallel and Distributed Systems
Combinatorial Properties of Two-Level Hypernet Networks
IEEE Transactions on Parallel and Distributed Systems
n-Dimensional Processor Arrays with Optical dBuses
The Journal of Supercomputing
Recursive Diagonal Torus: An Interconnection Network for Massively Parallel Computers
IEEE Transactions on Parallel and Distributed Systems
On the recognition of de Bruijn graphs and their induced subgraphs
Discrete Mathematics
Line Digraph Iterations and Connectivity Analysis of de Bruijn and Kautz Graphs
IEEE Transactions on Computers
Fault-Tolerant Meshes and Hypercubes with Minimal Numbers of Spares
IEEE Transactions on Computers
A Versatile Architecture for the Distributed Sensor Integration Problem
IEEE Transactions on Computers
Fault Tolerance in a Class of Sorting Networks
IEEE Transactions on Computers
DCC Linear Congruential Graphs: A New Class of Interconnection Networks
IEEE Transactions on Computers
Cube Connected Mobius Ladders: An Inherently Deadlock-Free Fixed Degree Network
IEEE Transactions on Parallel and Distributed Systems
Synthesis of Algorithm-Based Fault-Tolerant Systems from Dependence Graphs
IEEE Transactions on Parallel and Distributed Systems
The Hyper-deBruijn Networks: Scalable Versatile Architecture
IEEE Transactions on Parallel and Distributed Systems
Fault-Tolerant de Bruijn and Shuffle-Exchange Networks
IEEE Transactions on Parallel and Distributed Systems
Annealed Embeddings of Communication Patterns in an Interconnection Cached Network
IEEE Transactions on Parallel and Distributed Systems
Duplication-Based Scheduling Algorithm for Interconnection-Constrained Distributed Memory Machines
HiPC '02 Proceedings of the 9th International Conference on High Performance Computing
De Bruijn Graphs and DNA Graphs
WG '01 Proceedings of the 27th International Workshop on Graph-Theoretic Concepts in Computer Science
Recognizing DNA graphs is difficult
Discrete Applied Mathematics - Special issue: Computational molecular biology series issue IV
The Shuffle-Ring: Overcoming the Increasing Degree of Hypercube
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
On de Bruijn Routing in Distributed Hash Tables: There and Back Again
P2P '04 Proceedings of the Fourth International Conference on Peer-to-Peer Computing
Bridging the digital divide: storage media + postal network = generic high-bandwidth communication
ACM Transactions on Storage (TOS)
Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder
Proceedings of the 45th annual Design Automation Conference
Note: The Independence Number for De Bruijn networks and Kautz networks
Discrete Applied Mathematics
International Journal of Computer Mathematics
Turbo NOC: a framework for the design of network-on-chip-based turbo decoder architectures
IEEE Transactions on Circuits and Systems Part I: Regular Papers
International Journal of Sensor Networks
A novel hierarchical routing protocol for wireless sensor networks
ICCSA'05 Proceedings of the 2005 international conference on Computational Science and its Applications - Volume Part I
DPillar: Dual-port server interconnection network for large scale data centers
Computer Networks: The International Journal of Computer and Telecommunications Networking
Topological properties of the recursive Petersen architecture
Mathematical and Computer Modelling: An International Journal
A case for random shortcut topologies for HPC interconnects
Proceedings of the 39th Annual International Symposium on Computer Architecture
TM: a new and simple topology for interconnection networks
The Journal of Supercomputing
| Hi-index | 15.01 |
It is shown that the binary de Bruijn multiprocessor network (BDM) can solve a wide variety of classes of problems. The BDM admits an N-node linear array, an N-node ring, (N-1)-node complete binary trees, ((3N/4)-2)-node tree machines, and an N-node one-step shuffle-exchange network, where N (=2/sup k/, k an integer) is the total number of nodes. The de Bruijn multiprocessor networks are proved to be fault-tolerant as well as extensible. A tight lower bound of the VLSI layout area of the BDM is derived; a procedure for an area-optimal VLSI layout is also described. It is demonstrated that the BDM is more versatile than the shuffle-exchange and the cube-connected cycles. Recent work has classified sorting architectures into (1) sequential input/sequential output, (2) parallel input/sequential output, (3) parallel input/parallel output, (4) sequential input/parallel output, and (5) hybrid input/hybrid output. It is demonstrated that the de Bruijn multiprocessor networks can sort data items in all of the abovementioned categories. No other network which can sort data items in all the categories is known.