Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
High-performance multi-queue buffers for VLSI communications switches
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
Performance Analysis of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
An Adaptive and Fault Tolerant Wormhole Routing Strategy for k-ary n-cubes
IEEE Transactions on Computers
Chaos router: architecture and performance
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Express Cubes: Improving the Performance of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
Planar-adaptive routing: low-cost adaptive networks for multiprocessors
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
The turn model for adaptive routing
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
A comparison of adaptive wormhole routing algorithms
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Modeling, analysis and evaluation of adaptive routing strategies
Modeling, analysis and evaluation of adaptive routing strategies
Limits on Interconnection Network Performance
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Performance Analysis of Mesh Interconnection Networks with Deterministic Routing
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Adaptive Deadlock-Free Worrnhole Routing in Hypercubes
IPPS '92 Proceedings of the 6th International Parallel Processing Symposium
IPPS '92 Proceedings of the 6th International Parallel Processing Symposium
The Impact of Packetization in Wormhole-Routed Networks
PARLE '93 Proceedings of the 5th International PARLE Conference on Parallel Architectures and Languages Europe
Modeling Adaptive Routing in k-ary n-cube Networks
MASCOTS '94 Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
Empirical Evaluation of Incomplete Hypercube Systems
ICPP '93 Proceedings of the 1993 International Conference on Parallel Processing - Volume 01
Adaptive Deadlock-Free Routing in Multicomputers Using Only One Extra Virtual Channel
ICPP '93 Proceedings of the 1993 International Conference on Parallel Processing - Volume 01
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The performance of a massively parallel computing system is often limited by the speed of its interconnection network. One strategy that has been proposed for improving network efficiency is the use of adaptive routing, in which network state information can be used in determining message paths. The design of an adaptive routing system involves several parameters, and in order to build high speed scalable computing systems, it is important to understand the costs and performance benefits of these parameters. In this paper, we investigate the effect of buffer design on communication latency. Four message storage models and their related route selection algorithms are analyzed. A comparison of their performance is presented, and the features of buffer design which are found to significantly impact network efficiency are discussed.