A VLSI architecture for concurrent data structures
A VLSI architecture for concurrent data structures
A Performance Bound of Multistage Combining Networks
IEEE Transactions on Computers
Performance Analysis of k-ary n-cube Interconnection Networks
IEEE Transactions on Computers
ICS '90 Proceedings of the 4th international conference on Supercomputing
Limits on Interconnection Network Performance
IEEE Transactions on Parallel and Distributed Systems
The Impact of Pipelined Channels on k-ary n-Cube Networks
IEEE Transactions on Parallel and Distributed Systems
A complexity theory for VLSI
Interconnection network design based on packaging considerations
Interconnection network design based on packaging considerations
Designing Clustered Multiprocessor Systems under Packaging and Technological Advancements
IEEE Transactions on Parallel and Distributed Systems
Benefits of Processor Clustering in Designing Large Parallel Systems: When and How?
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
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