On Hypercube-based hierarchical interconnection network design
Journal of Parallel and Distributed Computing
The Stanford Dash Multiprocessor
Computer
Designing interconnection networks for multi-level packaging
Proceedings of the 1993 ACM/IEEE conference on Supercomputing
The Impact of Wiring Constraints on Hierarchical Network Performance
IPPS '92 Proceedings of the 6th International Parallel Processing Symposium
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Experiences with non-numeric applications on multithreaded architectures
PPOPP '97 Proceedings of the sixth ACM SIGPLAN symposium on Principles and practice of parallel programming
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Advances in multiprocessor interconnect technology are leading to high performance networks. However, software overheads associated with message passing are limiting the processors to get maximum performance from these networks, leading to under-utilization of network resources. Though processor-clusters are being used in some systems in an ad hoc manner to alleviate this problem, there is no formal analysis in the literature to show when and how processor clusters benefit in designing high performance and scalable systems. In this paper we analyze and solve this problem by considering processor-clustering, messaging overheads, and network performance in an integrated manner. Our analysis establishes the following three design guidelines. Compared to a base system, under high messaging overheads, processor clustering can be used to build a) an equal-sized system with a smaller network or b) a larger system with an equal-sized network. Under low messaging overheads, a combination of processor clustering and wider channels can be used to build a range of larger-sized systems. All these guidelines lead to designing cost-effective and scalable parallel systems while delivering high performance.