On Stable Parallel Linear System Solvers
Journal of the ACM (JACM)
Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
Introduction to VLSI Systems
Decentralized parallel algorithms for matrix computation
ISCA '78 Proceedings of the 5th annual symposium on Computer architecture
PUMPS Architecture for Pattern Analysis and Image Database Management
IEEE Transactions on Computers
VLSI Array Design Under Constraint of Limited I/O Bandwidth
IEEE Transactions on Computers
Systolic designs for Aitken's root finding method
Parallel Computing
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A new class of partitioned matrix algorithms is developed for possible VLSI implementation of large-scale matrix solvers. Fast matrix solvers are higherly demanded in signal/image processing and in many real-time and scientific applications. Only a few functional types of VLSI arithmetic chips are needed for submatrix computations after partitioning. This partitioned approach is not restricted by problem sizes and thus can be applied to solve arbitrarily large linear systems of equations in an iterative fashion. The following four matrix computations are shown systematically partitionable into submatrix operations, which are feasible for direct VLSI implementation.