Mechanical Verification of Adder Circuits using Rewrite RuleLaboratory

• Authors: Deepak Kapur;M. Subramaniam
• Venue: Formal Methods in System Design
• Year: 1998

A methodology for mechanically verifying generic adder circuits isproposed using the rewrite-rule based theorem prover {\it Rewrite\ Rule\ Laboratory} ({\it RRL}). Proofs of properties of adder circuitdescriptions are done byrewriting and induction. Carry lookahead adder circuit isdescribed using {\it powerlists}, a data structure introducedby Misra to support {\it divide-and-conquer} strategy used fordesigning data-parallel algorithms. This description uses analgorithm for {\it parallel\ prefix} computation on powerlists due toAdams. Reasoning about properties of this algorithm can be ofindependent interest since parallel prefix operator has beenfound useful in many data-parallel algorithms. The correctnessof the carry-lookahead adder (i.e., the adder indeed implementsaddition on numbers) is established by showing its equivalence toa recursive description of the ripple-carry adder, which is shown tocorrectly implement addition on natural numbers. The ripple carryadder circuit is described in two different but equivalent ways:using powerlists employing the divide-and-conquer strategy, as well as usinglinear lists employing the linear decomposition strategy. The description ofthe ripple carry adder using powerlists is useful for showingequivalence of its input-output behavior to that of carrylookahead adder, whereas the description using linear lists isuseful for showing its correctness with respect to addition onnatural numbers. Descriptions of adder circuits usingpowerlists are based on Adams‘ work who also gave a hand proof oftheir correctness using the powerlist algebra. The emphasis in thispaper is to {\it generate\ proofs\ mechanically\ by\ a\ theorem\ prover}. {\em RRL} exploits the algebraic laws of the powerlistalgebra as rewrite rules, and uses heuristics for mechanizingproofs by induction using the cover set method to generate suchproofs. The regularity in hardware circuits gets reflected incompact descriptions generated using the divide-and-conquerstrategy as well as in mechanically generated proofs byinduction. Mechanical proofs generated by {\em RRL} closelyfollow the well-crafted hand-proofs which is quite encouraging. Acomparison with Adams‘ hand generated proof is also made. Thereis strong evidence that the proposed methodology for generatingproofs should scale up for large circuits exhibiting regularitythat can be described using divide-and-conquer strategy in termsof powerlists.