Half-Hot State Assignments for Finite State Machines

Authors:
D. J. Rosenkrantz
Affiliations:
-
Venue:
IEEE Transactions on Computers
Year:
1990

Citing 3
Cited 2

The art of computer programming, volume 1 (3rd ed.): fundamental algorithms

The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
Introduction to VLSI Systems

Introduction to VLSI Systems
Computational Aspects of VLSI

Computational Aspects of VLSI

State assignment for hardwired VLSI control units

ACM Computing Surveys (CSUR)
Combined optimization of area and testability during state assignment of PLA-based FSM's

VLSID '95 Proceedings of the 8th International Conference on VLSI Design

Quantified Score

Hi-index	14.98

Visualization

Abstract

The state assignment problem for the programmable logic array (PLA) implementation of finite state machines is considered. It is pointed out that the number of PLA columns can be reduced by using state assignments leading to logic that is unate in the state variables. Half-hot state assignments are proposed, where each state has an encoding in which exactly half the state variables are equal to 1.