A Fault-Tolerant Modular Architecture for Binary Trees
IEEE Transactions on Computers - The MIT Press scientific computation series
A logarithmic time sort for linear size networks
Journal of the ACM (JACM)
On fault tolerant routings in general networks
PODC '86 Proceedings of the fifth annual ACM symposium on Principles of distributed computing
Continuous routing and batch routing on the hypercube
PODC '86 Proceedings of the fifth annual ACM symposium on Principles of distributed computing
Fault tolerance in networks of bounded degree
STOC '86 Proceedings of the eighteenth annual ACM symposium on Theory of computing
Aspects of information flow in VLSI circuits
STOC '86 Proceedings of the eighteenth annual ACM symposium on Theory of computing
An Array Layout Methodology for VLSI Circuits
IEEE Transactions on Computers
Dual Systolic Architectures for VLSI Digital Signal Processing Systems
IEEE Transactions on Computers
Microcode development for microprogrammed processors
MICRO 18 Proceedings of the 18th annual workshop on Microprogramming
Two tapes are better than one for off-line Turing machines
STOC '87 Proceedings of the nineteenth annual ACM symposium on Theory of computing
Efficient embeddings of binary trees in VLSI arrays
IEEE Transactions on Computers
On the Time-Bandwidth Proof in VLSI Complexity
IEEE Transactions on Computers
Optimal Partitioning and Redundancy Removal in Computing Partial Sums
IEEE Transactions on Computers
Reconfigurable Tree Architectures Using Subtree Oriented Fault Tolerance
IEEE Transactions on Computers
Mesh arrays and LOGICIAN: a tool for their efficient generation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
VLSI Architectures for multidimensional fourier transform processing
IEEE Transactions on Computers
An optimal synchronizer for the hypercube
PODC '87 Proceedings of the sixth annual ACM Symposium on Principles of distributed computing
The Cubical Ring Connected Cycles: A Fault Tolerant Parallel Computation Network
IEEE Transactions on Computers
Optimal VLSI circuits for sorting
Journal of the ACM (JACM)
On Multidimensional Arrays of Processors
IEEE Transactions on Computers
Modified-Mesh Connected Parallel Computers
IEEE Transactions on Computers
Broadcast Normalization in Systolic Design
IEEE Transactions on Computers
Synthesizing Linear Array Algorithms from Nested FOR Loop Algorithms
IEEE Transactions on Computers
Efficient Parallel Convex Hull Algorithms
IEEE Transactions on Computers
IEEE Transactions on Computers
Communication-sensitive heuristics and algorithms for mapping compilers
PPEALS '88 Proceedings of the ACM/SIGPLAN conference on Parallel programming: experience with applications, languages and systems
Conductance and the rapid mixing property for Markov chains: the approximation of permanent resolved
STOC '88 Proceedings of the twentieth annual ACM symposium on Theory of computing
Small sets supporting fary embeddings of planar graphs
STOC '88 Proceedings of the twentieth annual ACM symposium on Theory of computing
Parallel Sorting in Two-Dimensional VLSI Models of Computation
IEEE Transactions on Computers
A Group-Theoretic Model for Symmetric Interconnection Networks
IEEE Transactions on Computers
PRAM Processor Allocation: A Hidden Bottleneck in Sublogarithmic Algorithms
IEEE Transactions on Computers
A graph partitioning algorithm by node separators
ACM Transactions on Mathematical Software (TOMS)
A Gracefully Degradable VLSI System for Linear Programming
IEEE Transactions on Computers
Image Computations on Meshes with Multiple Broadcast
IEEE Transactions on Pattern Analysis and Machine Intelligence
PADD '88 Proceedings of the 1988 ACM SIGPLAN and SIGOPS workshop on Parallel and distributed debugging
Initial experiences with a pattern-oriented parallel debugger
PADD '88 Proceedings of the 1988 ACM SIGPLAN and SIGOPS workshop on Parallel and distributed debugging
Operations on sets of intervals - an exercise for data structures or algorithms
SIGCSE '89 Proceedings of the twentieth SIGCSE technical symposium on Computer science education
Microprogramming instruction systolic arrays
MICRO 22 Proceedings of the 22nd annual workshop on Microprogramming and microarchitecture
The Number of Intersections Between two Rectangular Paths
IEEE Transactions on Computers
Reconfigurable Multipipelines for Vector Supercomputers
IEEE Transactions on Computers
Extreme Area-Time Tradeoffs in VLSI
IEEE Transactions on Computers
A Note on the Linear Transformation Method for Systolic Array Design
IEEE Transactions on Computers
Crossing Minimization in Linear Embeddings of Graphs
IEEE Transactions on Computers
Half-Hot State Assignments for Finite State Machines
IEEE Transactions on Computers
The Organization of Permutation Architectures with Bused Interconnections
IEEE Transactions on Computers
Fast, Deterministic Routing, on Hypercubes, Using Small Buffers
IEEE Transactions on Computers
Tight bounds for oblivious routing in the hypercube
SPAA '90 Proceedings of the second annual ACM symposium on Parallel algorithms and architectures
Constraint-based query optimization for spatial databases
PODS '91 Proceedings of the tenth ACM SIGACT-SIGMOD-SIGART symposium on Principles of database systems
Optimal VLSI Sorting with Reduced Number of Processors
IEEE Transactions on Computers
Implementing hypertext database relationships through aggregations and exception
HYPERTEXT '91 Proceedings of the third annual ACM conference on Hypertext
Stochastic evolution: a fast effective heuristic for some generic layout problems
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Datapath generator based on gate-level symbolic layout
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Parallel Algorithms for Image Processing on OMC
IEEE Transactions on Computers
A Modular Fault-Tolerant Binary Tree Architecture with Short Links
IEEE Transactions on Computers
Optimal bounded-degree VLSI networks for sorting in a constant number of rounds
Proceedings of the 1991 ACM/IEEE conference on Supercomputing
A systolic array architecture for multiplying Toeplitz matrices
SAC '92 Proceedings of the 1992 ACM/SIGAPP symposium on Applied computing: technological challenges of the 1990's
On Optimal Single Jog River Routing (VLSI Layout)
IEEE Transactions on Computers
Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach
IEEE Transactions on Computers
Implementations of randomized sorting on large parallel machines
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
A Fast Distributed Shortest Path Algorithm for a Class of Hierarchically Clustered Data Networks
IEEE Transactions on Computers
Minimizing External Wires in Generalized Single-Row Routing
IEEE Transactions on Computers
Embedding leveled hypercube algorithms into hypercubes (extended abstract)
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
O(nlog log n)-work parallel algorithms for straight-line grid embeddings of planar graphs
SPAA '92 Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures
Parallel Architectures and Algorithms for Image Component Labeling
IEEE Transactions on Pattern Analysis and Machine Intelligence
Detection and Location of Multiple Faults in Baseline Interconnection Networks
IEEE Transactions on Computers
Worst-case bounds for subadditive geometric graphs
SCG '93 Proceedings of the ninth annual symposium on Computational geometry
Parallel Computations on Reconfigurable Meshes
IEEE Transactions on Computers
A New Class of Optimal Bounded-Degree VLSI Sorting Networks
IEEE Transactions on Computers
Parallel algorithms column 1: models of computation
ACM SIGACT News
Processor autonomy on SIMD architectures
ICS '93 Proceedings of the 7th international conference on Supercomputing
On the communication complexity of distributed algebraic computation
Journal of the ACM (JACM)
EURO-DAC '94 Proceedings of the conference on European design automation
Reconfigurable Buses with Shift Switching: Concepts and Applications
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Two Packet Routing Algorithms on a Mesh-Connected Computer
IEEE Transactions on Parallel and Distributed Systems
A unified approach to the extraction of realistic multiple bridging and break faults
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Embedding and Reconfiguration of Binary Trees in Faulty Hypercubes
IEEE Transactions on Parallel and Distributed Systems
An Efficient Dictionary Machine Using Hexagonal Processor Arrays
IEEE Transactions on Parallel and Distributed Systems
A Modular Systolic Linearization of the Warshall-Floyd Algorithm
IEEE Transactions on Parallel and Distributed Systems
Embedding of Complete Binary Trees into Meshes with Row-Column Routing
IEEE Transactions on Parallel and Distributed Systems
Parallel Divide and Conquer on Meshes
IEEE Transactions on Parallel and Distributed Systems
Mesh-Connected Trees: A Bridge Between Grids and Meshes of Trees
IEEE Transactions on Parallel and Distributed Systems
Possible and Impossible Self-Stabilizing Digital ClockSynchronization in General Graphs
Real-Time Systems - Special issue on global time in large scale distributed real-time systems, part I
A net-oriented method for realistic fault analysis
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Verifying parameterized networks
ACM Transactions on Programming Languages and Systems (TOPLAS)
Efficient VLSI Layouts for Homogeneous Product Networks
IEEE Transactions on Computers
Delay-optimal technology mapping for FPGAs with heterogeneous LUTs
DAC '98 Proceedings of the 35th annual Design Automation Conference
Mask verification on the connection machine
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
The Mesh with Hybrid Buses: An Efficient Parallel Architecture for Digital Geometry
IEEE Transactions on Parallel and Distributed Systems
Configuration of Locally Spared Arrays in the Presence of Multiple Fault Types
IEEE Transactions on Computers
Maximally fast and arbitrarily fast implementation of linear computations
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
An Orthogonal Time-Frequency Extraction Approach to 2D Systolic Architecture for 1D DFT Computation
Journal of VLSI Signal Processing Systems
A subjective review of compaction (tutorial session)
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Synthesis techniques for digital systems design
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A new method for verifying sequential circuits
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Principles of the SYCO compiler
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A parallel algorithm for finding a maximum flow in 0-1 networks
CSC '87 Proceedings of the 15th annual conference on Computer Science
Pyramid computer algorithms for determining geometric properties of images
SCG '85 Proceedings of the first annual symposium on Computational geometry
SCG '85 Proceedings of the first annual symposium on Computational geometry
MUPPET—a programming environment of message-based multiprocessors
ACM '86 Proceedings of 1986 ACM Fall joint computer conference
TIDBITS: speedup via time-delay bit-slicing in ALU design for VLSI technology
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
ACM Computing Surveys (CSUR)
Parallel hashing: an efficient implementation of shared memory
Journal of the ACM (JACM)
Scalable Hardware-Algorithms for Binary Prefix Sums
IEEE Transactions on Parallel and Distributed Systems
Designing new languages or new language manipulation systems using ML
ACM SIGPLAN Notices
Journal of VLSI Signal Processing Systems - Parallel VLSI architectures for image and video processing
Clairvoyant: a synthesis system for production-based specification
Readings in hardware/software co-design
Deep-Submicron Microprocessor Design Issues
IEEE Micro
Your Favorite Parallel Algorithms Might Not Be as Fast as You Think
IEEE Transactions on Computers
An Efficient Jacobi-Like Algorithm for Parallel Eigenvalue Computation
IEEE Transactions on Computers
IEEE Transactions on Computers
Almost Sure Diagnosis of Almost Every Good Element
IEEE Transactions on Computers
INCREDYBLE: A New Search Strategy for Design Automation Problems with Applications to Testing
IEEE Transactions on Computers
Long and Fast Up/Down Counters
IEEE Transactions on Computers
On Mapping Systolic Algorithms onto the Hypercube
IEEE Transactions on Parallel and Distributed Systems
A Generalized Simultaneous Access Dictionary Machine
IEEE Transactions on Parallel and Distributed Systems
A Processor-Time-Minimal Systolic Array for Transitive Closure
IEEE Transactions on Parallel and Distributed Systems
An Optimal Implementation of Broadcasting with Selective Reduction
IEEE Transactions on Parallel and Distributed Systems
Optimal Algorithms on the Pipelined Hypercube and Related Networks
IEEE Transactions on Parallel and Distributed Systems
Algorithms and Average Time Bounds of Sorting on a Mesh-Connected Computer
IEEE Transactions on Parallel and Distributed Systems
Optimal VLSI Networks for Multidimensional Transforms
IEEE Transactions on Parallel and Distributed Systems
Square Meshes Are Not Optimal for Convex Hull Computation
IEEE Transactions on Parallel and Distributed Systems
Algorithms for the fixed linear crossing number problem
Discrete Applied Mathematics
Integration, the VLSI Journal
A simple architecture for computing moments and orientation of an image
Fundamenta Informaticae
Connectivity Models for Optoelectronic Computing Systems
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
Efficient Addition on Field Programmable Gate Arrays
FST TCS '01 Proceedings of the 21st Conference on Foundations of Software Technology and Theoretical Computer Science
Drawing of Two-Dimensional Irregular Meshes
GD '98 Proceedings of the 6th International Symposium on Graph Drawing
Drawing Outer-Planar Graphs in O(n log n) Area
GD '02 Revised Papers from the 10th International Symposium on Graph Drawing
Efficient Systolic Array Mapping of FIR Filters Used in PAM-QAM Modulators
Journal of VLSI Signal Processing Systems
An introduction to processor-time-optimal systolic arrays
Highly parallel computaions
The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Microassembly and area reduction techniques for PLA microcode
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
Tight bounds on the complexity of parallel sorting
STOC '84 Proceedings of the sixteenth annual ACM symposium on Theory of computing
Retiming of synchronous circuits with variable topology
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Multilayer VLSI Layout for Interconnection Networks
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
An AT2 Optimal Mapping of Sorting onto the Mesh Connected Array without Comparators
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
An algebraic model for design space with applications to function module generation
EURO-DAC '90 Proceedings of the conference on European design automation
Testing Layered Interconnection Networks
IEEE Transactions on Computers
High-Performance Low-Power Left-to-Right Array Multiplier Design
IEEE Transactions on Computers
Fast consensus in networks of bounded degree
Distributed Computing
An analysis of some linear graph layout heuristics
Journal of Heuristics
Cache-Friendly implementations of transitive closure
Journal of Experimental Algorithmics (JEA)
Computational Properties of Mesh Connected Trees: Versatile Architectures for Parallel Computation
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Data-flow transformations using Taylor expansion diagrams
Proceedings of the conference on Design, automation and test in Europe
Approximating the fixed linear crossing number
Discrete Applied Mathematics
A Switch-Level Model and Simulator for MOS Digital Systems
IEEE Transactions on Computers
Formula dissection: A parallel algorithm for constraint satisfaction
Computers & Mathematics with Applications
The organization of permutation architectures with bussed interconnections
SFCS '87 Proceedings of the 28th Annual Symposium on Foundations of Computer Science
Optimal vertex ranking of block graphs
Information and Computation
Power scalability in a mesh-connected reconfigurable architecture
ACM Transactions on Embedded Computing Systems (TECS)
PaCT '09 Proceedings of the 10th International Conference on Parallel Computing Technologies
Integration, the VLSI Journal
Information flow and interconnections in computing: extensions and applications of Rent's rule
Journal of Parallel and Distributed Computing
Two pages graph layout via recurrent multivalued neural networks
IWANN'07 Proceedings of the 9th international work conference on Artificial neural networks
K-pages graph drawing with multivalued neural networks
ICANN'07 Proceedings of the 17th international conference on Artificial neural networks
Algorithmic techniques for regular networks of processors
Algorithms and theory of computation handbook
Algorithms and theory of computation handbook
High Accuracy Asymptotic Bounds on the BDD Size and Weight of the Hardest Functions
Fundamenta Informaticae - Hardest Boolean Functions and O.B. Lupanov
Clairvoyant: a synthesis system for production-based specification
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Submatrix maximum queries in Monge matrices and Monge partial matrices, and their applications
Proceedings of the twenty-third annual ACM-SIAM symposium on Discrete Algorithms
The potential of on-chip multiprocessing for QCD machines
HiPC'05 Proceedings of the 12th international conference on High Performance Computing
Energy-Privacy trade-offs in VLSI computations
INDOCRYPT'05 Proceedings of the 6th international conference on Cryptology in India
The size and depth of layered boolean circuits
LATIN'10 Proceedings of the 9th Latin American conference on Theoretical Informatics
Layout volumes of the hypercube
GD'04 Proceedings of the 12th international conference on Graph Drawing
On two-dimensional mesh networks and their simulation with p systems
WMC'04 Proceedings of the 5th international conference on Membrane Computing
A Simple Architecture for Computing Moments and Orientation of an Image
Fundamenta Informaticae
New area-time lower bounds for the multidimensional DFT
CATS 2011 Proceedings of the Seventeenth Computing on The Australasian Theory Symposium - Volume 119
Asymmetric scaling on network packet processors in the dark silicon era
ANCS '13 Proceedings of the ninth ACM/IEEE symposium on Architectures for networking and communications systems
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