A systolic array architecture for multiplying Toeplitz matrices

Authors:
S. Sureshchandran
Affiliations:
Department of Computer and Information Sciences, University of Delaware
Venue:
SAC '92 Proceedings of the 1992 ACM/SIGAPP symposium on Applied computing: technological challenges of the 1990's
Year:
1992

Citing 3
Cited 0

Introduction to VLSI Systems

Introduction to VLSI Systems
The Design and Analysis of Computer Algorithms

The Design and Analysis of Computer Algorithms
Computational Aspects of VLSI

Computational Aspects of VLSI

Quantified Score

Hi-index	0.00

Visualization

Abstract