Optimal VLSI circuits for sorting

  • Authors:
  • Richard Cole;Alan Siegel

  • Affiliations:
  • New York Univ., New York;New York Univ., New York

  • Venue:
  • Journal of the ACM (JACM)
  • Year:
  • 1988

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Abstract

This work describes a large number of constructions for sorting N integers in the range [0, M - 1], for N ≤ M ≤ N2, for the standard VLSI bit model. Among other results, we attain:VLSI sorter constructions that are within a constant factor of optimal size, for all M and almost all running times T.a fundamentally new merging network for sorting numbers in a bit model.new organizational approaches for optimal tuning of merging networks and the proper management of data flow.