A taxonomy of parallel sorting
ACM Computing Surveys (CSUR)
Sorting with efficient use of special-purpose sorters
Information Processing Letters
Optimal VLSI circuits for sorting
Journal of the ACM (JACM)
Sorting in c log n parallel steps
Combinatorica
Tight bounds on the complexity of parallel sorting
IEEE Transactions on Computers
A minimum area VLSI network for O(log n) time sorting
IEEE Transactions on Computers
Sorting n Objects with a k-Sorter
IEEE Transactions on Computers
Sorting n numbers on n×n reconfigurable meshes with buses
Journal of Parallel and Distributed Computing
An optimal sorting algorithm on reconfigurable mesh
Journal of Parallel and Distributed Computing
Journal of Parallel and Distributed Computing
Parallel computation: models and methods
Parallel computation: models and methods
The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
Parallel permutation and sorting algorithms and a new generalized connection network
Journal of the ACM (JACM)
Parallel Sorting Algorithms
Sorting N Items Using a p-Sorter in Optimal Time
SPDP '96 Proceedings of the 8th IEEE Symposium on Parallel and Distributed Processing (SPDP '96)
An Optimal Hardware-Algorithm for Sorting Using a Fixed-Size Parallel Sorting Device
IEEE Transactions on Computers
Classifying Matrices Separating Rows and Columns
IEEE Transactions on Parallel and Distributed Systems
Arbitrary long digit integer sorter HW/SW co-design
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
A scalable VLSI speed/area tunable sorting network
Journal of Systems Architecture: the EUROMICRO Journal
An ASIC design and formal analysis of a novel pipelined and parallel sorting accelerator
Integration, the VLSI Journal
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A robust channel estimator for high-mobility STBC-OFDM systems
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Parallelizing the merge sorting network algorithm on a multi-core computer using Go and Cilk
Proceedings of the 49th Annual Southeast Regional Conference
On the complexity of min-max sorting networks
Information Sciences: an International Journal
A convolve-and-merge approach for exact computations on high-performance reconfigurable computers
International Journal of Reconfigurable Computing - Special issue on High-Performance Reconfigurable Computing
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Sorting networks of fixed I/O size p have been used, thus far, for sorting a set of p elements. Somewhat surprisingly, the important problem of using such a sorting network for sorting arbitrarily large data sets has not been addressed in the literature. Our main contribution is to propose a simple sorting architecture whose main feature is the pipelined use of a sorting network of fixed I/O size p to sort an arbitrarily large data set of N elements. A noteworthy feature of our design is that no extra data memory space is required, other than what is used for storing the input. As it turns out, our architecture is feasible for VLSI implementation and its time performance is virtually independent of the cost and depth of the underlying sorting network. Specifically, we show that by using our design N elements can be sorted in \Theta({\frac Np} \log {\frac Np}) time without memory access conflicts. Finally, weshow how to use an AT^2-optimal sorting network of fixed I/O size p to construct a similar architecture that sorts N elements in \Theta({\frac N{p}} \log {\frac N{p\log p}}) time.