An ASIC design and formal analysis of a novel pipelined and parallel sorting accelerator

Authors:
Nozar Tabrizi;Nader Bagherzadeh
Affiliations:
Department of Electrical and Computer Engineering, Kettering University, Flint, MI 48504, USA;Department of Electrical Engineering and Computer Science, University of California, Irvine, CA 92697, USA
Venue:
Integration, the VLSI Journal
Year:
2008

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Abstract

Thermal gradients across the die are becoming increasingly prominent as we scale further down into the sub-nanometer regime. While temperature was never a primary concern, its non-negligible impact on delay and reliability is getting significant attention ...