Efficient Schemes for Parallel Communication
Journal of the ACM (JACM)
A logarithmic time sort for linear size networks
Journal of the ACM (JACM)
Tight bounds on the complexity of parallel sorting
IEEE Transactions on Computers
A minimum area VLSI network for O(log n) time sorting
IEEE Transactions on Computers
The art of computer programming, volume 3: (2nd ed.) sorting and searching
The art of computer programming, volume 3: (2nd ed.) sorting and searching
The cube-connected cycles: a versatile network for parallel computation
Communications of the ACM
Sorting on a mesh-connected parallel computer
Communications of the ACM
Parallel Sorting Algorithms
Universal schemes for parallel communication
STOC '81 Proceedings of the thirteenth annual ACM symposium on Theory of computing
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
Computational Aspects of VLSI
Parallel Architectures and Algorithms for Image Component Labeling
IEEE Transactions on Pattern Analysis and Machine Intelligence
Sorting and merging on the DAP
ACM-SE 30 Proceedings of the 30th annual Southeast regional conference
Hi-index | 14.98 |
A new parallel architecture is presented which has p processors and N=n/sup 2/ memory locations, each consisting of 2s bits. The proposed organization can sort N s-bit numbers, where s=O((1+ epsilon ) log N), epsilon