Invariance and non-determinacy
Proc. of a discussion meeting of the Royal Society of London on Mathematical logic and programming languages
Automatic verification of finite-state concurrent systems using temporal logic specifications
ACM Transactions on Programming Languages and Systems (TOPLAS)
Limits for automatic verification of finite-state concurrent systems
Information Processing Letters
Reasoning about networks with many identical finite state processes
Information and Computation
A structural induction theorem for processes
Proceedings of the eighth annual ACM Symposium on Principles of distributed computing
Verifying properties of large sets of processes with network invariants
Proceedings of the international workshop on Automatic verification methods for finite state systems
Network grammars, communication behaviors and automatic verification
Proceedings of the international workshop on Automatic verification methods for finite state systems
Model checking and abstraction
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Reasoning about systems with many processes
Journal of the ACM (JACM)
Symbolic model checking: 1020 states and beyond
Information and Computation - Special issue: Selections from 1990 IEEE symposium on logic in computer science
Model checking and modular verification
ACM Transactions on Programming Languages and Systems (TOPLAS)
POPL '95 Proceedings of the 22nd ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Checking that finite state concurrent programs satisfy their linear specification
POPL '85 Proceedings of the 12th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
A Calculus of Communicating Systems
A Calculus of Communicating Systems
Automata, Languages, and Machines
Automata, Languages, and Machines
Specification and verification of concurrent systems in CESAR
Proceedings of the 5th Colloquium on International Symposium on Programming
Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic
Logic of Programs, Workshop
Computational Aspects of VLSI
Verifying safety properties of concurrent Java programs using 3-valued logic
POPL '01 Proceedings of the 28th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Refactoring design models for inductive verification
ISSTA '02 Proceedings of the 2002 ACM SIGSOFT international symposium on Software testing and analysis
Constraint-Based Model Checking for Parameterized Synchronous Systems
FroCoS '02 Proceedings of the 4th International Workshop on Frontiers of Combining Systems
Automated Inductive Verification of Parameterized Protocols
CAV '01 Proceedings of the 13th International Conference on Computer Aided Verification
Algorithmic Verification of Invalidation-Based Protocols
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
Constraint-Based Verification of Parameterized Cache Coherence Protocols
Formal Methods in System Design
Inductively Verifying Invariant Properties of Parameterized Systems
Automated Software Engineering
Compositional analysis for verification of parameterized systems
Theoretical Computer Science - Tools and algorithms for the construction and analysis of systems (TACAS 2003)
A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Symbolic reachability analysis for parameterized administrative role based access control
Proceedings of the 14th ACM symposium on Access control models and technologies
Verification of Parameterized Systems with Combinations of Abstract Domains
FMOODS '09/FORTE '09 Proceedings of the Joint 11th IFIP WG 6.1 International Conference FMOODS '09 and 29th IFIP WG 6.1 International Conference FORTE '09 on Formal Techniques for Distributed Systems
A formal approach to the verification of networks on chip
EURASIP Journal on Embedded Systems
Verifying safety properties of concurrent heap-manipulating programs
ACM Transactions on Programming Languages and Systems (TOPLAS)
A generic framework for reasoning about dynamic networks of infinite-state processes
TACAS'07 Proceedings of the 13th international conference on Tools and algorithms for the construction and analysis of systems
Compositional analysis for verification of parameterized systems
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
An invariant-based approach to the verification of asynchronous parameterized networks
Journal of Symbolic Computation
An approach for machine-assisted verification of Timed CSP specifications
Innovations in Systems and Software Engineering
Verifying safety of a token coherence implementation by parametric compositional refinement
VMCAI'05 Proceedings of the 6th international conference on Verification, Model Checking, and Abstract Interpretation
A generic network on chip model
TPHOLs'05 Proceedings of the 18th international conference on Theorem Proving in Higher Order Logics
Parameterized verification of π-calculus systems
TACAS'06 Proceedings of the 12th international conference on Tools and Algorithms for the Construction and Analysis of Systems
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Future Generation Computer Systems
Hi-index | 0.00 |
This article describes a technique based on network grammars and abstraction to verify families of state-transition systems. The family of state-transition systems is represented by a context-free network grammar. Using the structure of the network grammar our technique constructs a process invariant that simulates all the state-transition systems in the family. A novel idea introduced in this article is the use of regular languages to express state properties. We have implemented our techniques and verified two nontrivial examples.