The connection machine
Communications of the ACM - Special issue on parallelism
Circuit simulation on the connection machine
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
An algorithm for design rule checking on a multiprocessor
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Space efficient algorithms for VLSI artwork analysis
DAC '83 Proceedings of the 20th Design Automation Conference
The scan line approach to design rules checking: Computational experiences
DAC '84 Proceedings of the 21st Design Automation Conference
An O (N log N) algorithm for Boolean mask operations
DAC '81 Proceedings of the 18th Design Automation Conference
A parallel bit map processor architecture for DA algorithms
DAC '81 Proceedings of the 18th Design Automation Conference
A hardware assisted design rule check architecture
DAC '82 Proceedings of the 19th Design Automation Conference
Computational Aspects of VLSI
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Circuit extraction on a message-based multiprocessor
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
MAPS: multi-algorithm parallel circuit simulation
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
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Parallel mask verification algorithms have been developed for the Connection Machine, a massively parallel processor with up to 64K processors. We discuss the design and implementation of algorithms for several essential primitives: generation of completely-intersected mask data, mask-to-mask Boolean operations, labeling of connected regions, and identification of width and spacing violations. Performance results from experiments on a 16K-processor machine are presented. Speedups between 40 and 240 over a VAX 11/785 have been measured.