Introduction to VLSI Systems
DAC '79 Proceedings of the 16th Design Automation Conference
A high performance routing engine
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
A hardware accelerator for maze routing
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
A preliminary investigation into parallel routing on a hypercube computer
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Global wiring on a wire routing machine
25 years of DAC Papers on Twenty-five years of electronic design automation
Special purpose architecture for accelerating Bitmap DRC
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A Hardware Accelerator for Maze Routing
IEEE Transactions on Computers
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Mask verification on the connection machine
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
LocusRoute: a parallel global router for standard cells
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A new routing algorithm and its hardware implementation
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A large scale cellular array processor: AAP-1
CSC '85 Proceedings of the 1985 ACM thirteenth annual conference on Computer Science
A systolic design rule checker
DAC '84 Proceedings of the 21st Design Automation Conference
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
DAC '82 Proceedings of the 19th Design Automation Conference
Global wiring on a wire routing machine
DAC '82 Proceedings of the 19th Design Automation Conference
A hardware assisted design rule check architecture
DAC '82 Proceedings of the 19th Design Automation Conference
Towards VLSI complexity: The DA algorithm scaling problem: can special DA hardware help?
DAC '82 Proceedings of the 19th Design Automation Conference
Cellular image processing techniques for VLSI circuit layout validation and routing
DAC '82 Proceedings of the 19th Design Automation Conference
Parallel processing, special-purpose hardware, and DA applications
CSC-83 Proceedings of the 1983 computer science conference
Parallel VLSI-Routing Models for Polymorphic Processors Array
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
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Bit maps have been used in many Design Automation (DA) algorithms such as printed circuit board (PCB) layout and integrated circuit (IC) design rule checking (DRC). The attraction of bit maps is that they provide a direct representation of two-dimensional images. The difficulty with large scale use of bit maps (e.g., for DRC on VLSI) is that the large amounts of data can consume impractical amounts of computation on sequential machines. This paper describes a processing architecture that is specifically designed to operate on bit maps. It has an inherently two-dimensional construction and has a very large parallel processing capability. Also included in this paper are descriptions of algorithms that exploit the architecture. Algorithms for routing, DRC, and bit vector manipulation are included.