Computer arithmetic algorithms
Computer arithmetic algorithms
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Synchronous up/down binary counter for LUT FPGAs with counting frequency independent of counter size
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Synchronous Up/Down Counter with Clock Period Independent of Counter Size
ARITH '97 Proceedings of the 13th Symposium on Computer Arithmetic (ARITH '97)
Computational Aspects of VLSI
Selective Clock-Gating for Low Power/Low Noise Synchronous Counters 1
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
L-CBF: a low-power, fast counting bloom filter architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Low-power CMOS synchronous counter with clock gating embedded into carry propagation
IEEE Transactions on Circuits and Systems II: Express Briefs
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This paper presents recent advances in the design of constant-time up/down counters in the general context of fast counter design. An overview of existing techniques for the design of long and fast counters reveals several methods closely related to the design of fast adders, as well as some techniques that are only valid for counter design. The main idea behind the novel up/down counters is to recognize that the only extra difficulty with an up/down (vs. up-only or down-only) counter is when the counter changes direction from counting up to counting down (and vice-versa). For dealing with this difficulty, the new design uses a "shadow" register for storing the previous counter state. When counting only up or only down, the counter functions like a standard up-only or down-only constant time counter, but, when it changes direction instead of trying to compute the new value (which typically requires carry propagation), it simply uses the contents of the shadow register which contains the exact desired previous value. An alternative approach for restoring the previous state in constant time is to store the carry bits in a Carry/Borrow register.