Low-power CMOS synchronous counter with clock gating embedded into carry propagation

Authors:
Young-Won Kim;Joo-Seong Kim;Jae-Hyuk Oh;Yoon-Suk Park;Jong-Woo Kim;Kwang-Il Park;Bai-Sun Kong;Young-Hyun Jun
Affiliations:
School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Korea;School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Korea;School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Korea;School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Korea;School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Korea;Semiconductor Business, Samsung Electronics, Hwasung, Korea;School of Information and Communication Engineering, Sungkyunkwan University, Suwon, Korea;Semiconductor Business, Samsung Electronics, Hwasung, Korea
Venue:
IEEE Transactions on Circuits and Systems II: Express Briefs
Year:
2009

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Abstract

A novel low-power CMOS synchronous counter whose clock-gating logic is embedded into a carry propagation circuit is proposed. The proposed synchronous counter operates with no redundant transitions and requires fewer transistors, minimizing tbe switching power consumption and silicon area as compared wlth conventional CMOS synchronous counters. The proposed synchronous counter consisting of 16 bits was fabricated in 0.18-µm CMOS technology. The experimental result indicates that the proposed synchronous counter achieves a power saving of 64% with 15% device count reduction.