Long and Fast Up/Down Counters
IEEE Transactions on Computers
L-CBF: a low-power, fast counting bloom filter architecture
Proceedings of the 2006 international symposium on Low power electronics and design
L-CBF: a low-power, fast counting bloom filter architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The theory and practice of up-only or down-only prescaled (or constant time) counters is well understood both in industry and in the academia. Such counters are obtained by partitioning the counter into sub-blocks in order to be able to anticipate the CARRY propagation inside each block (similar to a carry-select adder). When properly designed, prescaled counters have a clock period independent of counter size. Until now it was not known whether it is possible to design a constant time up/down binary counter. This paper presents the theory behind building a synchronous up/down counter of arbitrary length and with period independent of counter size. The main idea behind the novel up/down counter is to recognize that the only extra difficulty with an up/down (vs. up-only or down-only) constant time counter is when the counter changes ``direction'' from counting up to counting down and vice-versa. For dealing with this difficulty the new design uses a ``shadow'' register inside each sub-block with the purpose of always storing the previous block value. When counting only up or only down the counter functions like a standard up-only or down-only constant time counter, but when it changes direction, instead of trying to compute the new value (which typically requires carry propagation), it simply uses the contents of the shadow register which contains the exact desired previous value. A 64-bit up/down counter running at 40MHz was implemented in an Atmel AT6000 FPGA and similar up/down counters can be implemented in any technology.