A separator theorem for graphs of bounded genus
Journal of Algorithms
The complexity of Boolean functions
The complexity of Boolean functions
A separator theorem for graphs with an excluded minor and its applications
STOC '90 Proceedings of the twenty-second annual ACM symposium on Theory of computing
Journal of the ACM (JACM)
Relations Among Complexity Measures
Journal of the ACM (JACM)
Graph separators, with applications
Graph separators, with applications
Locally Synchronous Complexity in the Light of the Trans-Box Method
STACS '84 Proceedings of the Symposium of Theoretical Aspects of Computer Science
On Restricted Boolean Circuits
FCT '89 Proceedings of the International Conference on Fundamentals of Computation Theory
Computational Aspects of VLSI
An observation on time-storage trade off
Journal of Computer and System Sciences
The size and depth of layered Boolean circuits
Information Processing Letters
A generalization of spira's theorem and circuits with small segregators or separators
SOFSEM'12 Proceedings of the 38th international conference on Current Trends in Theory and Practice of Computer Science
| Hi-index | 0.00 |
We consider the relationship between size and depth for layered Boolean circuits, synchronous circuits and planar circuits as well as classes of circuits with small separators. In particular, we show that every layered Boolean circuit of size s can be simulated by a layered Boolean circuit of depth $O(\sqrt{s\log s})$. For planar circuits and synchronous circuits of size s, we obtain simulations of depth $O(\sqrt{s})$. The best known result so far was by Paterson and Valiant [16], and Dymond and Tompa [6], which holds for general Boolean circuits and states that D(f)=O(C(f)/logC(f)), where C(f) and D(f) are the minimum size and depth, respectively, of Boolean circuits computing f. The proof of our main result uses an adaptive strategy based on the two-person pebble game introduced by Dymond and Tompa [6]. Improving any of our results by polylog factors would immediately improve the bounds for general circuits.