State assignment using a new embedding method based on an intersecting cube theory
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
NOVA: state assignment of finite state machines for optimal two-level logic implementations
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Horizontal partitioning of PLA-based finite state machines
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Half-Hot State Assignments for Finite State Machines
IEEE Transactions on Computers
Optimized Synthesis of Concurrently Checked Controllers
IEEE Transactions on Computers
A framework for satisfying input and output encoding constraints
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A unified approach to input-output encoding for FSM state assignment
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A unified approach for the synthesis of self-testable finite state machines
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A kernel-finding state assignment algorithm for multi-level logic
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
An implementation of a state assignment heuristic
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
P-Complete Approximation Problems
Journal of the ACM (JACM)
Asynchronous Sequential Switching Circuit
Asynchronous Sequential Switching Circuit
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Logical Design of Digital Systems
Logical Design of Digital Systems
A State-Machine Synthesizer—SMS
DAC '81 Proceedings of the 18th Design Automation Conference
State assignment of controllers for optimal area implementation
EURO-DAC '90 Proceedings of the conference on European design automation
Synthesis of fully testable sequential machines
EURO-DAC '91 Proceedings of the conference on European design automation
Reduction in the number of LUT elements for control units with code sharing
International Journal of Applied Mathematics and Computer Science
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Finding a binary encoding of symbolic control states, such that the implementation area of a digital control unit is minimized is well known to be NP-complete. Many heuristic algorithms have been proposed for this state assignment problem. The objective of this article is to present a comprehensive survey and systematic categorization of the various techniques, in particular, for synchronous sequential circuits with nonmicroprogrammed implementations. The problem is partitioned into the generation and the satisfaction of coding constraints. Three types of coding constraints—adjacency, covering, and disjunctive constraints—are widely used. The constraint satisfaction algorithms are classified into column-based, row-based, tree-based, dichotomy-based, and global minimization approaches. All of them are illustrated with examples. Special coding requirements and testability-related aspects of state assignment are considered in a separate section. Different implementations of the algorithms presented are also compared.