State assignment for hardwired VLSI control units
ACM Computing Surveys (CSUR)
Functional Decomposition with Application to FPGA Synthesis
Functional Decomposition with Application to FPGA Synthesis
Synthesis of Finite State Machines: Functional Optimization
Synthesis of Finite State Machines: Functional Optimization
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
The Design Warrior's Guide to FPGAs
The Design Warrior's Guide to FPGAs
Hardware Implementation Analysis of the MD5 Hash Algorithm
HICSS '05 Proceedings of the Proceedings of the 38th Annual Hawaii International Conference on System Sciences - Volume 09
Embedded Core Design with FPGAs
Embedded Core Design with FPGAs
Logic Synthesis for Compositional Microprogram Control Units
Logic Synthesis for Compositional Microprogram Control Units
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Two methods are proposed targeted at reduction in the number of look-up table elements in logic circuits of compositional microprogram control units (CMCUs) with code sharing. The methods assume the application of field-programmable gate arrays for the implementation of the combinational part of the CMCU, whereas embedded-memory blocks are used for implementation of its control memory. Both methods are based on the existence of classes of pseudoequivalent operational linear chains in a microprogram to be implemented. Conditions for the application of the proposed methods and examples of design are shown. Results of conducted experiments are given.