Clocking Schemes for High-Speed Digital Systems
IEEE Transactions on Computers
An Algebraic Model for Asynchronous Circuits Verification
IEEE Transactions on Computers
A unified framework for race analysis of asynchronous networks
Journal of the ACM (JACM)
ACM SIGMICRO Newsletter
Simulation of ram-based asynchronous sequential circuits
ANSS '90 Proceedings of the 23rd annual symposium on Simulation
Utilizing logic information in multi-level timing simulation
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Algorithms for synthesis of hazard-free asynchronous circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Synthesis of multiple-input change asynchronous finite state machines
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Self Synchronized Asynchronous Sequential Pass Transistor Circuits
IEEE Transactions on Computers
Solving the state assignment problem for signal transition graphs
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Asynchronous state machine synthesis using data driven clocks
EURO-DAC '92 Proceedings of the conference on European design automation
State assignment for hardwired VLSI control units
ACM Computing Surveys (CSUR)
Automatic technology mapping for generalized fundamental-mode asynchronous designs
DAC '93 Proceedings of the 30th international Design Automation Conference
Designing an Asynchronous Communications Chip
IEEE Design & Test
TITAC: Design of A Quasi-Delay-Insensitive Microprocessor
IEEE Design & Test
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Performance-driven synthesis of asynchronous controllers
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Decomposition methods for library binding of speed-independent asynchronous designs
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Testing redundant asynchronous circuits by variable phase splitting
EURO-DAC '94 Proceedings of the conference on European design automation
Symbolic hazard-free minimization and encoding of asynchronous finite state machines
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Espresso-HF: a heuristic hazard-free minimizer for two-level logic
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Synthesis of hazard-free customized CMOS complex-gate networks under multiple-input changes
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Symbolic optimization of FSM networks based on sequential ATPG techniques
DAC '96 Proceedings of the 33rd annual Design Automation Conference
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
Input don't care sequences in FSM networks
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Cluster-cover: a theoretical framework for a class of VLSI-CAD optimization problems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Synthesis of Hazard-Free Asynchronous Circuits Based on Characteristic Graph
IEEE Transactions on Computers
Asynchronous interface specification, analysis and synthesis
DAC '98 Proceedings of the 35th annual Design Automation Conference
Redundancy Removal during High-Level Synthesis Using Scheduling Don‘t-Cares
Journal of Electronic Testing: Theory and Applications
Lazy transition systems: application to timing optimization of asynchronous circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A generalized state assignment theory for transformation on signal transition graphs
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Verification of asynchronous interface circuits with bounded wire delays
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Valid clocking in wavepipelined circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Automatic synthesis of 3D asynchronous state machines
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Automatic gate-level synthesis of speed-independent circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Exact two-level minimization of hazard-free logic with multiple-input changes
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Hazard-non-increasing gate-level optimization algorithms
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Practical advances in asynchronous design and in asynchronous/synchronous interfaces
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
On Redundant Path Delay Faults in Synchronous Sequential Circuits
IEEE Transactions on Computers
Efficient methods for embedded system design space exploration
Proceedings of the 37th Annual Design Automation Conference
OPTIMISTA: state minimization of asynchronous FSMs for optimum output logic
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Synchronous equivalence for embedded systems: a tool for design exploration
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Oscillatory Metastability in Optical Network Synchronizer Circuits
The Journal of Supercomputing
Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays
IEEE Transactions on Computers
The Organization of Microprogram Stores
ACM Computing Surveys (CSUR)
A new paradigm for dichotomy-based constrained encoding
Proceedings of the conference on Design, automation and test in Europe
Implementing asynchronous circuits using a conventional EDA tool-flow
Proceedings of the 39th annual Design Automation Conference
Logic Synthesis and Verification
Modular requirements for digital logic simulation at a predefined functional level
ACM '72 Proceedings of the ACM annual conference - Volume 1
Checking Combinational Equivalence of Speed-Independent Circuits
Formal Methods in System Design
An FPGA for Implementing Asynchronous Circuits
IEEE Design & Test
Deep-Submicron Microprocessor Design Issues
IEEE Micro
Race-Free State Assignments for Synthesizing Large-Scale Asynchronous Sequential Logic Circuits
IEEE Transactions on Computers
High-Speed Microprogrammable Asynchronous Controller Modules
IEEE Transactions on Computers
Hazards, Critical Races, and Metastability
IEEE Transactions on Computers
Application of Bipartite Graphs for Achieving Race-Free State Assignments
IEEE Transactions on Computers
Statistical Carry Lookahead Adders
IEEE Transactions on Computers
Asynchronous Comparison-Based Decoders for Delay-Insensitive Codes
IEEE Transactions on Computers
Performance Analysis of Asynchronous Circuits Using Markov Chains
Concurrency and Hardware Design, Advances in Petri Nets
From STG to Extended-Burst-Mode Machines
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Hardware for searching very large text databases
CAW '80 Proceedings of the fifth workshop on Computer architecture for non-numeric processing
Proof of the equivalent realizability of a time-bounded arbiter and a runt-free inertial delay
ISCA '79 Proceedings of the 6th annual symposium on Computer architecture
Logic properties of unate and of symmetric discrete functions
MVL '76 Proceedings of the sixth international symposium on Multiple-valued logic
Synthesis of p-valued asynchronous sequential circuits by using a general clock function
MVL '76 Proceedings of the sixth international symposium on Multiple-valued logic
Parallel and serial decompositions of multi-valued sequential machines
MVL '78 Proceedings of the eighth international symposium on Multiple-valued logic
Hazard detection by a quinary simulation of logic devices with bounded propagation delays
DAC '72 Proceedings of the 9th Design Automation Workshop
Verification of hardware designs thru symbolic manipulation
Proceedings of the Symposium on Design Automation and Microprocessors
Uniform modular realization of sequential machines
ACM '68 Proceedings of the 1968 23rd ACM national conference
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Robust Sequential Fault Testing of Iterative Logic Arrays
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
8.1 Robustly Testable Array Multipliers under Realistic Sequential Cell Fault Model
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Beyond two
Formal Methods in System Design
A new method for the state reduction of incompletely specified finite sequential machines
EURO-DAC '90 Proceedings of the conference on European design automation
Fast heuristic algorithms for finite state machine minimization
EURO-DAC '91 Proceedings of the conference on European design automation
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Fast hazard detection in combinational circuits
Proceedings of the 41st annual Design Automation Conference
Optimization of NULL convention self-timed circuits
Integration, the VLSI Journal
Concurrent Error Detection in Asynchronous Burst-Mode Controllers
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Modular requirements for digital logic simulation at a predefined functional level
ACM SIGDA Newsletter
A formal approach to designing delay-insensitive circuits
Distributed Computing
Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllers
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Quasi-static Scheduling for Concurrent Architectures
Fundamenta Informaticae - Application of Concurrency to System Design (ACSD'03)
Journal of Systems Architecture: the EUROMICRO Journal
Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines
IEEE Transactions on Computers
Asynchronous machines exhibiting concurrency
Record of the Project MAC conference on concurrent systems and parallel computation
CASCADE: a tool kernel supporting a comprehensive design method for asynchronous controllers
ICATPN'00 Proceedings of the 21st international conference on Application and theory of petri nets
An error-correcting unordered code and hardware support for robust asynchronous global communication
Proceedings of the Conference on Design, Automation and Test in Europe
| Hi-index | 0.04 |