Application of Ternary Algebra to the Study of Static Hazards
Journal of the ACM (JACM)
Asynchronous Sequential Switching Circuit
Asynchronous Sequential Switching Circuit
An Investigation of the Laws of Thought
An Investigation of the Laws of Thought
G-vector: A New Model for Glitch Analysis in Logic Circuits
Journal of VLSI Signal Processing Systems
CDALGO - a test pattern generation program
DAC '76 Proceedings of the 13th Design Automation Conference
Functional testing of LSI gate arrays
DAC '74 Proceedings of the 11th Design Automation Workshop
Fast hazard detection in combinational circuits
Proceedings of the 41st annual Design Automation Conference
On the Three-Valued Simulation of Digital Systems
IEEE Transactions on Computers
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Effective logic simulation programs must consider device propagation delays to be bounded values. This requires that the logic devices be simulated by models which use a multi-valued logical algebra. A quinary algebra is developed and employed in special algorithms which not only accurately predict the behavior of a logic circuit for all values of delay, but also detect the possibility of latent hazards and race conditions. A sample problem is simulated, and conclusions drawn.