Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Intellectual property re-use in embedded system co-design: an industrial case study
Proceedings of the 11th international symposium on System synthesis
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Worst-case analysis of discrete systems
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Synchronous equivalence for embedded systems: a tool for design exploration
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Symbolic Model Checking
Asynchronous Sequential Switching Circuit
Asynchronous Sequential Switching Circuit
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Proceedings of the joint conference on Languages, compilers and tools for embedded systems: software and compilers for embedded systems
Energy reduction techniques for multimedia applications with tolerance to deadline misses
Proceedings of the 40th annual Design Automation Conference
Simulation and Analysis of Embedded DSP Systems Using MASIC Methodology
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Probabilistic design of multimedia embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
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Design space exploration is the process of analyzing several functionally equivalent alternatives to determine the most suitable one. The synchronous assumption has made it possible to develop efficient procedures for establishing functional equivalence between different implementations in the domain of synchronous circuits as well as in the domain of synchronous reactive systems. We extend this notion to embedded systems that do not satisfy the synchronous assumption inside their boundaries but only at the interface with the environment Leveraging this property, we developed efficient synchronous equivalence analysis algorithms for embedded systems with loops and architectures with multiple computational units. We demonstrate our method on an ATM switch containing many interacting components.