The Design and Use of Hazard-Free Switching Networks
Journal of the ACM (JACM)
An ALGOL-like computer design language
Communications of the ACM
Asynchronous Sequential Switching Circuit
Asynchronous Sequential Switching Circuit
Formal design verification of digital systems
DAC '83 Proceedings of the 20th Design Automation Conference
A formal design verification system based on an automated reasoning system
DAC '84 Proceedings of the 21st Design Automation Conference
Application of hardware description languages to microprogramming: Method, practice, and limitations
MICRO 12 Proceedings of the 12th annual workshop on Microprogramming
A formal method for computer design verification
DAC '82 Proceedings of the 19th Design Automation Conference
An Inductive Assertion Method for Register Transfer Level Design Verification
IEEE Transactions on Computers
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This paper describes a method for detecting errors in hardware designs based on algebraic manipulation. The behavior of a hardware system is specified using a non-procedural register transfer language. Similar specifications are provided for each component in the circuit. Using the techniques discussed here it should be possible to determine if the device will function correctly. The problem of detecting races and hazards in this framework is also addressed.